/external/llvm/test/CodeGen/Mips/ |
alloca16.ll | 26 ; 16: subu $[[REGISTER:[0-9]+]], ${{[0-9]+}}, ${{[0-9]+}}
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madd-msub.ll | 168 ; 32R6-DAG: subu $2, $[[T5]], $[[T4]] 169 ; 32R6-DAG: subu $3, $6, $[[T1]] 199 ; 32-DAG: [[m:m]]subu ${{[45]}}, ${{[45]}} 215 ; 32R6-DAG: subu $3, $6, $[[T1]] 265 ; 32R6-DAG: subu $2, $6, $[[T3]] 266 ; 32R6-DAG: subu $3, $7, $[[T1]]
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/external/valgrind/main/none/tests/mips64/ |
arithmetic_instruction.c | 15 SUBU 24 for (op = ADD; op <= SUBU; op++) { 345 case SUBU: 349 TEST1("subu $t0, $t1, $t2", reg_val1[i], reg_val1[N-i-1],
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/prebuilts/ndk/8/platforms/android-14/arch-mips/usr/include/asm/ |
div64.h | 25 #define do_div64_32(res, high, low, base) ({ unsigned long __quot32, __mod32; unsigned long __cf, __tmp, __tmp2, __i; __asm__(".set push\n\t" ".set noat\n\t" ".set noreorder\n\t" "move %2, $0\n\t" "move %3, $0\n\t" "b 1f\n\t" " li %4, 0x21\n" "0:\n\t" "sll $1, %0, 0x1\n\t" "srl %3, %0, 0x1f\n\t" "or %0, $1, %5\n\t" "sll %1, %1, 0x1\n\t" "sll %2, %2, 0x1\n" "1:\n\t" "bnez %3, 2f\n\t" " sltu %5, %0, %z6\n\t" "bnez %5, 3f\n" "2:\n\t" " addiu %4, %4, -1\n\t" "subu %0, %0, %z6\n\t" "addiu %2, %2, 1\n" "3:\n\t" "bnez %4, 0b\n\t" " srl %5, %1, 0x1f\n\t" ".set pop" : "=&r" (__mod32), "=&r" (__tmp), "=&r" (__quot32), "=&r" (__cf), "=&r" (__i), "=&r" (__tmp2) : "Jr" (base), "0" (high), "1" (low)); (res) = __quot32; __mod32; })
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/prebuilts/ndk/8/platforms/android-9/arch-mips/usr/include/asm/ |
div64.h | 25 #define do_div64_32(res, high, low, base) ({ unsigned long __quot32, __mod32; unsigned long __cf, __tmp, __tmp2, __i; __asm__(".set push\n\t" ".set noat\n\t" ".set noreorder\n\t" "move %2, $0\n\t" "move %3, $0\n\t" "b 1f\n\t" " li %4, 0x21\n" "0:\n\t" "sll $1, %0, 0x1\n\t" "srl %3, %0, 0x1f\n\t" "or %0, $1, %5\n\t" "sll %1, %1, 0x1\n\t" "sll %2, %2, 0x1\n" "1:\n\t" "bnez %3, 2f\n\t" " sltu %5, %0, %z6\n\t" "bnez %5, 3f\n" "2:\n\t" " addiu %4, %4, -1\n\t" "subu %0, %0, %z6\n\t" "addiu %2, %2, 1\n" "3:\n\t" "bnez %4, 0b\n\t" " srl %5, %1, 0x1f\n\t" ".set pop" : "=&r" (__mod32), "=&r" (__tmp), "=&r" (__quot32), "=&r" (__cf), "=&r" (__i), "=&r" (__tmp2) : "Jr" (base), "0" (high), "1" (low)); (res) = __quot32; __mod32; })
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/prebuilts/ndk/9/platforms/android-12/arch-mips/usr/include/asm/ |
div64.h | 25 #define do_div64_32(res, high, low, base) ({ unsigned long __quot32, __mod32; unsigned long __cf, __tmp, __tmp2, __i; __asm__(".set push\n\t" ".set noat\n\t" ".set noreorder\n\t" "move %2, $0\n\t" "move %3, $0\n\t" "b 1f\n\t" " li %4, 0x21\n" "0:\n\t" "sll $1, %0, 0x1\n\t" "srl %3, %0, 0x1f\n\t" "or %0, $1, %5\n\t" "sll %1, %1, 0x1\n\t" "sll %2, %2, 0x1\n" "1:\n\t" "bnez %3, 2f\n\t" " sltu %5, %0, %z6\n\t" "bnez %5, 3f\n" "2:\n\t" " addiu %4, %4, -1\n\t" "subu %0, %0, %z6\n\t" "addiu %2, %2, 1\n" "3:\n\t" "bnez %4, 0b\n\t" " srl %5, %1, 0x1f\n\t" ".set pop" : "=&r" (__mod32), "=&r" (__tmp), "=&r" (__quot32), "=&r" (__cf), "=&r" (__i), "=&r" (__tmp2) : "Jr" (base), "0" (high), "1" (low)); (res) = __quot32; __mod32; })
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/prebuilts/ndk/9/platforms/android-13/arch-mips/usr/include/asm/ |
div64.h | 25 #define do_div64_32(res, high, low, base) ({ unsigned long __quot32, __mod32; unsigned long __cf, __tmp, __tmp2, __i; __asm__(".set push\n\t" ".set noat\n\t" ".set noreorder\n\t" "move %2, $0\n\t" "move %3, $0\n\t" "b 1f\n\t" " li %4, 0x21\n" "0:\n\t" "sll $1, %0, 0x1\n\t" "srl %3, %0, 0x1f\n\t" "or %0, $1, %5\n\t" "sll %1, %1, 0x1\n\t" "sll %2, %2, 0x1\n" "1:\n\t" "bnez %3, 2f\n\t" " sltu %5, %0, %z6\n\t" "bnez %5, 3f\n" "2:\n\t" " addiu %4, %4, -1\n\t" "subu %0, %0, %z6\n\t" "addiu %2, %2, 1\n" "3:\n\t" "bnez %4, 0b\n\t" " srl %5, %1, 0x1f\n\t" ".set pop" : "=&r" (__mod32), "=&r" (__tmp), "=&r" (__quot32), "=&r" (__cf), "=&r" (__i), "=&r" (__tmp2) : "Jr" (base), "0" (high), "1" (low)); (res) = __quot32; __mod32; })
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/prebuilts/ndk/9/platforms/android-14/arch-mips/usr/include/asm/ |
div64.h | 25 #define do_div64_32(res, high, low, base) ({ unsigned long __quot32, __mod32; unsigned long __cf, __tmp, __tmp2, __i; __asm__(".set push\n\t" ".set noat\n\t" ".set noreorder\n\t" "move %2, $0\n\t" "move %3, $0\n\t" "b 1f\n\t" " li %4, 0x21\n" "0:\n\t" "sll $1, %0, 0x1\n\t" "srl %3, %0, 0x1f\n\t" "or %0, $1, %5\n\t" "sll %1, %1, 0x1\n\t" "sll %2, %2, 0x1\n" "1:\n\t" "bnez %3, 2f\n\t" " sltu %5, %0, %z6\n\t" "bnez %5, 3f\n" "2:\n\t" " addiu %4, %4, -1\n\t" "subu %0, %0, %z6\n\t" "addiu %2, %2, 1\n" "3:\n\t" "bnez %4, 0b\n\t" " srl %5, %1, 0x1f\n\t" ".set pop" : "=&r" (__mod32), "=&r" (__tmp), "=&r" (__quot32), "=&r" (__cf), "=&r" (__i), "=&r" (__tmp2) : "Jr" (base), "0" (high), "1" (low)); (res) = __quot32; __mod32; })
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/prebuilts/ndk/9/platforms/android-15/arch-mips/usr/include/asm/ |
div64.h | 25 #define do_div64_32(res, high, low, base) ({ unsigned long __quot32, __mod32; unsigned long __cf, __tmp, __tmp2, __i; __asm__(".set push\n\t" ".set noat\n\t" ".set noreorder\n\t" "move %2, $0\n\t" "move %3, $0\n\t" "b 1f\n\t" " li %4, 0x21\n" "0:\n\t" "sll $1, %0, 0x1\n\t" "srl %3, %0, 0x1f\n\t" "or %0, $1, %5\n\t" "sll %1, %1, 0x1\n\t" "sll %2, %2, 0x1\n" "1:\n\t" "bnez %3, 2f\n\t" " sltu %5, %0, %z6\n\t" "bnez %5, 3f\n" "2:\n\t" " addiu %4, %4, -1\n\t" "subu %0, %0, %z6\n\t" "addiu %2, %2, 1\n" "3:\n\t" "bnez %4, 0b\n\t" " srl %5, %1, 0x1f\n\t" ".set pop" : "=&r" (__mod32), "=&r" (__tmp), "=&r" (__quot32), "=&r" (__cf), "=&r" (__i), "=&r" (__tmp2) : "Jr" (base), "0" (high), "1" (low)); (res) = __quot32; __mod32; })
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/prebuilts/ndk/9/platforms/android-16/arch-mips/usr/include/asm/ |
div64.h | 25 #define do_div64_32(res, high, low, base) ({ unsigned long __quot32, __mod32; unsigned long __cf, __tmp, __tmp2, __i; __asm__(".set push\n\t" ".set noat\n\t" ".set noreorder\n\t" "move %2, $0\n\t" "move %3, $0\n\t" "b 1f\n\t" " li %4, 0x21\n" "0:\n\t" "sll $1, %0, 0x1\n\t" "srl %3, %0, 0x1f\n\t" "or %0, $1, %5\n\t" "sll %1, %1, 0x1\n\t" "sll %2, %2, 0x1\n" "1:\n\t" "bnez %3, 2f\n\t" " sltu %5, %0, %z6\n\t" "bnez %5, 3f\n" "2:\n\t" " addiu %4, %4, -1\n\t" "subu %0, %0, %z6\n\t" "addiu %2, %2, 1\n" "3:\n\t" "bnez %4, 0b\n\t" " srl %5, %1, 0x1f\n\t" ".set pop" : "=&r" (__mod32), "=&r" (__tmp), "=&r" (__quot32), "=&r" (__cf), "=&r" (__i), "=&r" (__tmp2) : "Jr" (base), "0" (high), "1" (low)); (res) = __quot32; __mod32; })
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/prebuilts/ndk/9/platforms/android-17/arch-mips/usr/include/asm/ |
div64.h | 25 #define do_div64_32(res, high, low, base) ({ unsigned long __quot32, __mod32; unsigned long __cf, __tmp, __tmp2, __i; __asm__(".set push\n\t" ".set noat\n\t" ".set noreorder\n\t" "move %2, $0\n\t" "move %3, $0\n\t" "b 1f\n\t" " li %4, 0x21\n" "0:\n\t" "sll $1, %0, 0x1\n\t" "srl %3, %0, 0x1f\n\t" "or %0, $1, %5\n\t" "sll %1, %1, 0x1\n\t" "sll %2, %2, 0x1\n" "1:\n\t" "bnez %3, 2f\n\t" " sltu %5, %0, %z6\n\t" "bnez %5, 3f\n" "2:\n\t" " addiu %4, %4, -1\n\t" "subu %0, %0, %z6\n\t" "addiu %2, %2, 1\n" "3:\n\t" "bnez %4, 0b\n\t" " srl %5, %1, 0x1f\n\t" ".set pop" : "=&r" (__mod32), "=&r" (__tmp), "=&r" (__quot32), "=&r" (__cf), "=&r" (__i), "=&r" (__tmp2) : "Jr" (base), "0" (high), "1" (low)); (res) = __quot32; __mod32; })
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/prebuilts/ndk/9/platforms/android-18/arch-mips/usr/include/asm/ |
div64.h | 25 #define do_div64_32(res, high, low, base) ({ unsigned long __quot32, __mod32; unsigned long __cf, __tmp, __tmp2, __i; __asm__(".set push\n\t" ".set noat\n\t" ".set noreorder\n\t" "move %2, $0\n\t" "move %3, $0\n\t" "b 1f\n\t" " li %4, 0x21\n" "0:\n\t" "sll $1, %0, 0x1\n\t" "srl %3, %0, 0x1f\n\t" "or %0, $1, %5\n\t" "sll %1, %1, 0x1\n\t" "sll %2, %2, 0x1\n" "1:\n\t" "bnez %3, 2f\n\t" " sltu %5, %0, %z6\n\t" "bnez %5, 3f\n" "2:\n\t" " addiu %4, %4, -1\n\t" "subu %0, %0, %z6\n\t" "addiu %2, %2, 1\n" "3:\n\t" "bnez %4, 0b\n\t" " srl %5, %1, 0x1f\n\t" ".set pop" : "=&r" (__mod32), "=&r" (__tmp), "=&r" (__quot32), "=&r" (__cf), "=&r" (__i), "=&r" (__tmp2) : "Jr" (base), "0" (high), "1" (low)); (res) = __quot32; __mod32; })
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/prebuilts/ndk/9/platforms/android-19/arch-mips/usr/include/asm/ |
div64.h | 25 #define do_div64_32(res, high, low, base) ({ unsigned long __quot32, __mod32; unsigned long __cf, __tmp, __tmp2, __i; __asm__(".set push\n\t" ".set noat\n\t" ".set noreorder\n\t" "move %2, $0\n\t" "move %3, $0\n\t" "b 1f\n\t" " li %4, 0x21\n" "0:\n\t" "sll $1, %0, 0x1\n\t" "srl %3, %0, 0x1f\n\t" "or %0, $1, %5\n\t" "sll %1, %1, 0x1\n\t" "sll %2, %2, 0x1\n" "1:\n\t" "bnez %3, 2f\n\t" " sltu %5, %0, %z6\n\t" "bnez %5, 3f\n" "2:\n\t" " addiu %4, %4, -1\n\t" "subu %0, %0, %z6\n\t" "addiu %2, %2, 1\n" "3:\n\t" "bnez %4, 0b\n\t" " srl %5, %1, 0x1f\n\t" ".set pop" : "=&r" (__mod32), "=&r" (__tmp), "=&r" (__quot32), "=&r" (__cf), "=&r" (__i), "=&r" (__tmp2) : "Jr" (base), "0" (high), "1" (low)); (res) = __quot32; __mod32; })
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/prebuilts/ndk/9/platforms/android-9/arch-mips/usr/include/asm/ |
div64.h | 25 #define do_div64_32(res, high, low, base) ({ unsigned long __quot32, __mod32; unsigned long __cf, __tmp, __tmp2, __i; __asm__(".set push\n\t" ".set noat\n\t" ".set noreorder\n\t" "move %2, $0\n\t" "move %3, $0\n\t" "b 1f\n\t" " li %4, 0x21\n" "0:\n\t" "sll $1, %0, 0x1\n\t" "srl %3, %0, 0x1f\n\t" "or %0, $1, %5\n\t" "sll %1, %1, 0x1\n\t" "sll %2, %2, 0x1\n" "1:\n\t" "bnez %3, 2f\n\t" " sltu %5, %0, %z6\n\t" "bnez %5, 3f\n" "2:\n\t" " addiu %4, %4, -1\n\t" "subu %0, %0, %z6\n\t" "addiu %2, %2, 1\n" "3:\n\t" "bnez %4, 0b\n\t" " srl %5, %1, 0x1f\n\t" ".set pop" : "=&r" (__mod32), "=&r" (__tmp), "=&r" (__quot32), "=&r" (__cf), "=&r" (__i), "=&r" (__tmp2) : "Jr" (base), "0" (high), "1" (low)); (res) = __quot32; __mod32; })
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/external/chromium_org/skia/ext/ |
convolver_mips_dspr2.cc | 109 "subu.ph $t1, $t0, $t6 \n" 113 "subu.ph $t3, $t2, $t6 \n" 210 "subu.ph $t5, $t1, $t6 \n" 214 "subu.ph $t4, $t2, $t6 \n" 337 "subu.ph $t1, $t0, $t4 \n" 341 "subu.ph $t2, $t2, $t4 \n" 452 "subu.ph $t1, $t1, $t6 \n" 456 "subu.ph $t2, $t2, $t6 \n"
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/frameworks/compile/mclinker/lib/Target/Mips/ |
MipsPLT.cpp | 21 0x031cc023, // subu $24, $24, $28 25 0x2718fffe // subu $24, $24, 2
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/art/compiler/dex/quick/mips/ |
int_mips.cc | 36 * subu res, t0, t1 # res = -1:1:0 for [ < > = ] 40 * subu res, t0, t1 425 * subu v0,a0,a2 426 * subu v1,a1,a3 427 * subu v1,v1,t1 470 * subu v1,v1,t1
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/external/chromium_org/third_party/openssl/openssl/crypto/bn/asm/ |
mips-mont.pl | 78 $SUBU="dsubu"; 85 $SUBU="subu"; 366 $SUBU $lo1,$lo0,$lo1 # tp[i]-np[i] 368 $SUBU $lo0,$lo1,$hi0 376 $SUBU $hi0,$hi1,$hi0 # handle upmost overflow bit
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mips3.s | 114 subu a2,4 153 subu a2,1 168 subu a2,1 223 subu a2,4 263 subu a2,1 274 subu a2,1 320 subu a2,4 356 subu a2,1 365 subu a2,1 398 subu a3, [all...] |
/external/openssl/crypto/bn/asm/ |
mips-mont.pl | 78 $SUBU="dsubu"; 85 $SUBU="subu"; 366 $SUBU $lo1,$lo0,$lo1 # tp[i]-np[i] 368 $SUBU $lo0,$lo1,$hi0 376 $SUBU $hi0,$hi1,$hi0 # handle upmost overflow bit
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mips3.s | 114 subu a2,4 153 subu a2,1 168 subu a2,1 223 subu a2,4 263 subu a2,1 274 subu a2,1 320 subu a2,4 356 subu a2,1 365 subu a2,1 398 subu a3, [all...] |
/external/chromium_org/v8/src/mips/ |
lithium-codegen-mips.cc | 178 __ Subu(sp, sp, Operand(slots * kPointerSize)); 184 __ Subu(a0, a0, Operand(kPointerSize)); 189 __ Subu(sp, sp, Operand(slots * kPointerSize)); 265 __ Subu(sp, sp, Operand(slots * kPointerSize)); 812 __ Subu(a1, a1, Operand(1)); [all...] |
code-stubs-mips.cc | 477 __ Subu(sp, sp, Operand(param_count * kPointerSize)); 550 __ subu(at, zero_reg, source_); 575 __ subu(mantissa, mantissa, zeros_); 659 __ Subu(scratch, result_reg, HeapNumber::kExponentMask); 664 __ Subu(result_reg, 706 __ subu(scratch, at, scratch); 710 __ Subu(scratch, zero_reg, scratch); 723 __ Subu(result_reg, zero_reg, input_high); 760 __ subu(at, zero_reg, the_int_); [all...] |
codegen-mips.cc | 128 __ subu(a3, zero_reg, a0); // In delay slot. 132 __ subu(a2, a2, a3); // In delay slot. a2 is the remining bytes count. 152 __ subu(a3, a2, t8); // In delay slot. 162 __ Subu(t9, t0, pref_limit); // t9 is the "last safe pref" address. 263 __ subu(a3, t8, a2); // In delay slot. 294 __ subu(a2, a2, a3); // In delay slot. 319 __ subu(a3, a2, t8); // In delay slot. 324 __ Subu(t9, t0, pref_limit); 560 __ subu(a3, t8, a2); // In delay slot. [all...] |
/external/chromium_org/third_party/webrtc/modules/audio_processing/aecm/ |
aecm_core_mips.c | 173 "subu %[tmp2], $zero, %[tmp2] \n\t" 176 "subu %[tmp4], $zero, %[tmp4] \n\t" 184 "subu %[tmp2], $zero, %[tmp2] \n\t" 187 "subu %[tmp4], $zero, %[tmp4] \n\t" 233 "subu %[tmp_im], $zero, %[tmp_im] \n\t" 244 "subu %[tmp_im], $zero, %[tmp_im] \n\t" 255 "subu %[tmp_im], $zero, %[tmp_im] \n\t" 266 "subu %[tmp_im], $zero, %[tmp_im] \n\t" [all...] |