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  /external/llvm/test/MC/Disassembler/ARM/
fp-encoding.txt 94 # CHECK: vmls.f64 d16, d18, d17
97 # CHECK: vmls.f32 s1, s2, s0
neont2.txt 622 # CHECK: vmls.i8 d16, d18, d17
624 # CHECK: vmls.i16 d16, d18, d17
626 # CHECK: vmls.i32 d16, d18, d17
628 # CHECK: vmls.f32 d16, d18, d17
630 # CHECK: vmls.i8 q9, q8, q10
632 # CHECK: vmls.i16 q9, q8, q10
634 # CHECK: vmls.i32 q9, q8, q10
636 # CHECK: vmls.f32 q9, q8, q10
    [all...]
neon.txt 725 # CHECK: vmls.i8 d16, d18, d17
727 # CHECK: vmls.i16 d16, d18, d17
729 # CHECK: vmls.i32 d16, d18, d17
731 # CHECK: vmls.f32 d16, d18, d17
733 # CHECK: vmls.i8 q9, q8, q10
735 # CHECK: vmls.i16 q9, q8, q10
737 # CHECK: vmls.i32 q9, q8, q10
739 # CHECK: vmls.f32 q9, q8, q10
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  /external/llvm/test/CodeGen/ARM/
fmacs.ll 55 ; It's possible to make use of fp vmla / vmls on Cortex-A9.
  /frameworks/av/media/libstagefright/codecs/on2/h264dec/omxdl/arm_neon/vc/m4p10/src_gcc/
armVCM4P10_InterpolateLuma_HalfDiagHorVer4x4_unsafe_s.S 151 VMLS.I32 q3,q0,q14
  /external/llvm/test/MC/ARM/
single-precision-fp.s 22 vmls.f64 d8, d7, d6
32 @ CHECK-ERRORS-NEXT: vmls.f64 d8, d7, d6
simple-fp-encoding.s 102 vmls.f64 d16, d18, d17
103 vmls.f32 s1, s2, s0
105 @ CHECK: vmls.f64 d16, d18, d17 @ encoding: [0xe1,0x0b,0x42,0xee]
106 @ CHECK: vmls.f32 s1, s2, s0 @ encoding: [0x40,0x0a,0x41,0xee]
  /external/valgrind/main/none/tests/arm/
neon64.stdout.exp     [all...]
neon128.stdout.exp     [all...]
  /external/chromium_org/v8/test/cctest/
test-disasm-arm.cc 580 COMPARE(vmls(d2, d1, d0),
581 "ee012b40 vmls.f64 d2, d1, d0");
582 COMPARE(vmls(d6, d4, d5, cc),
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test-assembler-arm.cc 247 __ vmls(d5, d5, d6);
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  /prebuilts/gcc/linux-x86/x86/x86_64-linux-android-4.9/lib/gcc/x86_64-linux-android/4.9/include/
arm_neon.h 391 //Vector multiply subtract: vmls -> Vr[i] := Va[i] - Vb[i] * Vc[i]
393 int8x16_t vmlsq_s8(int8x16_t a, int8x16_t b, int8x16_t c); // VMLS.I8 q0,q0,q0
394 int16x8_t vmlsq_s16(int16x8_t a, int16x8_t b, int16x8_t c); // VMLS.I16 q0,q0,q0
395 int32x4_t vmlsq_s32(int32x4_t a, int32x4_t b, int32x4_t c); // VMLS.I32 q0,q0,q0
396 float32x4_t vmlsq_f32(float32x4_t a, float32x4_t b, float32x4_t c); // VMLS.F32 q0,q0,q0
397 uint8x16_t vmlsq_u8(uint8x16_t a, uint8x16_t b, uint8x16_t c); // VMLS.I8 q0,q0,q0
398 uint16x8_t vmlsq_u16(uint16x8_t a, uint16x8_t b, uint16x8_t c); // VMLS.I16 q0,q0,q0
399 uint32x4_t vmlsq_u32(uint32x4_t a, uint32x4_t b, uint32x4_t c); // VMLS.I32 q0,q0,q0
    [all...]
  /external/clang/test/CodeGen/
arm_neon_intrinsics.c     [all...]
  /external/clang/include/clang/Basic/
arm_neon.td 513 def VMLS : IOpInst<"vmls", "dddd", "csifUcUsUiQcQsQiQfQUcQUsQUi", OP_MLS>;
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  /external/chromium_org/v8/src/arm/
disasm-arm.cc     [all...]
assembler-arm.h     [all...]
simulator-arm.cc     [all...]
  /art/disassembler/
disassembler_arm.cc 837 // VMLA, VMLS, VMUL, VNMUL, VADD, VSUB, VDIV, VMOV, ...
846 // |1110|1110|0|D|00| Vn | Vd |101|S|N|1|M|0| Vm | VMLS
860 opcode << (Q == 0 ? "vmla" : "vmls") << (S != 0 ? ".f64" : ".f32");
    [all...]
  /external/qemu/target-arm/
translate.c     [all...]
  /external/qemu/disas/
arm.c     [all...]
  /external/llvm/lib/Target/ARM/
ARMInstrNEON.td     [all...]
ARMInstrVFP.td     [all...]
ARMScheduleSwift.td     [all...]
ARMISelDAGToDAG.cpp 48 cl::desc("Check fp vmla / vmls hazard at isel time"),
407 /// node. VFP / NEON fp VMLA / VMLS instructions have special RAW hazards (at
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  /prebuilts/gcc/linux-x86/aarch64/aarch64-linux-android-4.9/x86_64-linux-gnu/aarch64-linux-android/lib/
libopcodes.a     [all...]

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