/external/llvm/include/llvm/CodeGen/ |
ScheduleDAGInstrs.h | 71 /// vreg use list. 121 /// After calling BuildSchedGraph, each vreg used in the scheduling region 122 /// is mapped to a set of SUnits. These include all local vreg uses, not 123 /// just the uses for a singly defined vreg.
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MachineSSAUpdater.h | 34 /// vreg with uses of a set of vregs.
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/external/llvm/test/CodeGen/X86/ |
misched-copy.ll | 13 ; CHECK-NEXT: MUL32r %vreg{{[0-9]+}}, %EAX<imp-def>, %EDX<imp-def>, %EFLAGS<imp-def,dead>, %EAX<imp-use>;
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/external/llvm/test/DebugInfo/ARM/ |
selectiondag-deadcode.ll | 12 ; of the vreg holding %agg.result) the dbg_value becomes dangling
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/external/llvm/lib/CodeGen/SelectionDAG/ |
InstrEmitter.h | 84 /// ConstrainForSubReg - Try to constrain VReg to a register class that 87 unsigned ConstrainForSubReg(unsigned VReg, unsigned SubIdx,
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/external/llvm/lib/Target/ARM/ |
Thumb1RegisterInfo.cpp | 557 unsigned VReg = 0; 645 // register. The offset is already handled in the vreg value. 649 VReg = MF.getRegInfo().createVirtualRegister(&ARM::tGPRRegClass); 654 emitThumbRegPlusImmInReg(MBB, II, dl, VReg, FrameReg, 657 emitLoadConstPool(MBB, II, dl, VReg, 0, Offset); 661 emitThumbRegPlusImmediate(MBB, II, dl, VReg, FrameReg, Offset, TII, 664 MI.getOperand(FIOperandNum).ChangeToRegister(VReg, false, false, true); 667 // register. The offset is already handled in the vreg value.
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/external/chromium_org/third_party/mesa/src/src/mesa/drivers/dri/i965/ |
brw_wm_pass0.c | 52 memset(&c->vreg[c->nr_vreg], 0, sizeof(*c->vreg)); 53 return &c->vreg[c->nr_vreg++];
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brw_wm.c | 285 void *vreg = c->vreg; local 290 c->vreg = vreg; 311 c->vreg = rzalloc_array(c, struct brw_wm_value, BRW_WM_MAX_VREG);
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/external/mesa3d/src/mesa/drivers/dri/i965/ |
brw_wm_pass0.c | 52 memset(&c->vreg[c->nr_vreg], 0, sizeof(*c->vreg)); 53 return &c->vreg[c->nr_vreg++];
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brw_wm.c | 285 void *vreg = c->vreg; local 290 c->vreg = vreg; 311 c->vreg = rzalloc_array(c, struct brw_wm_value, BRW_WM_MAX_VREG);
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/art/compiler/dex/ |
mir_graph.h | 205 * In general, vreg/sreg describe Dalvik registers that originated with dx. However, 757 int GetUseCount(int vreg) const { 758 return use_counts_.Get(vreg); 761 int GetRawUseCount(int vreg) const { 762 return raw_use_counts_.Get(vreg); 913 // Is this vreg in the in set? 914 bool IsInVReg(int vreg) { 915 return (vreg >= cu_->num_regs); [all...] |
/art/runtime/interpreter/ |
interpreter_common.cc | 171 static JValue GetFieldValue(const ShadowFrame& shadow_frame, uint32_t vreg) 176 field_value.SetZ(static_cast<uint8_t>(shadow_frame.GetVReg(vreg))); 179 field_value.SetB(static_cast<int8_t>(shadow_frame.GetVReg(vreg))); 182 field_value.SetC(static_cast<uint16_t>(shadow_frame.GetVReg(vreg))); 185 field_value.SetS(static_cast<int16_t>(shadow_frame.GetVReg(vreg))); 188 field_value.SetI(shadow_frame.GetVReg(vreg)); 191 field_value.SetJ(shadow_frame.GetVRegLong(vreg)); 194 field_value.SetL(shadow_frame.GetVRegReference(vreg)); [all...] |
/system/core/libpixelflinger/codeflinger/ |
blending.cpp | 541 int vreg = v.reg; 544 MOV(AL, 0, d.reg, reg_imm(vreg, LSR, vshift)); 545 vreg = d.reg; 548 MOV(AL, 0, d.reg, reg_imm(vreg, LSR, fshift)); 551 if (smulw) SMULW(AL, xy, d.reg, vreg, freg); 552 else SMUL(AL, xy, d.reg, vreg, freg);
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/external/llvm/lib/CodeGen/ |
MachineFunction.cpp | 438 unsigned VReg = MRI.getLiveInVirtReg(PReg); 439 if (VReg) { 440 const TargetRegisterClass *VRegRC = MRI.getRegClass(VReg); 450 return VReg; 452 VReg = MRI.createVirtualRegister(RC); 453 MRI.addLiveIn(PReg, VReg); 454 return VReg; [all...] |
PHIElimination.cpp | 75 /// vreg is coming from. This is used later to determine when the vreg 455 // This vreg no longer lives all of the way through opBlock. 531 /// used in a PHI node. We map that to the BB the vreg is coming from. This is 532 /// used later to determine when the vreg is killed in the BB.
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MachineRegisterInfo.cpp | 343 /// getLiveInPhysReg - If VReg is a live-in virtual register, return the 345 unsigned MachineRegisterInfo::getLiveInPhysReg(unsigned VReg) const { 347 if (I->second == VReg)
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TailDuplication.cpp | 245 unsigned VReg = SSAUpdateVRs[i]; 246 SSAUpdate.Initialize(VReg); 250 MachineInstr *DefMI = MRI->getVRegDef(VReg); 254 SSAUpdate.AddAvailableValue(DefBB, VReg); 259 SSAUpdateVals.find(VReg); 267 MachineRegisterInfo::use_iterator UI = MRI->use_begin(VReg); [all...] |
RegAllocBasic.cpp | 190 // Spill each interfering vreg allocated to PhysReg or an alias. 198 // Deallocate the interfering vreg by removing it from the union.
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TargetRegisterInfo.cpp | 42 OS << "%vreg" << TargetRegisterInfo::virtReg2Index(Reg); 78 OS << "%vreg" << TargetRegisterInfo::virtReg2Index(Unit);
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/art/compiler/dex/quick/arm/ |
fp_arm.cc | 294 // In case result vreg is also a src vreg, break association to avoid useless copy by EvalLoc() 302 // In case result vreg is also a srcvreg, break association to avoid useless copy by EvalLoc()
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/art/compiler/dex/quick/arm64/ |
fp_arm64.cc | 280 // In case result vreg is also a src vreg, break association to avoid useless copy by EvalLoc() 288 // In case result vreg is also a srcvreg, break association to avoid useless copy by EvalLoc()
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/art/runtime/gc/collector/ |
mark_sweep.h | 250 static void VerifyRootCallback(const mirror::Object* root, void* arg, size_t vreg, 253 void VerifyRoot(const mirror::Object* root, size_t vreg, const StackVisitor* visitor,
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/external/llvm/lib/Target/Mips/ |
MipsOptimizePICCall.cpp | 126 /// jalr $vreg 128 /// copy $t9, $vreg
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/external/llvm/lib/Target/NVPTX/InstPrinter/ |
NVPTXInstPrinter.cpp | 70 unsigned VReg = RegNo & 0x0FFFFFFF; 71 OS << VReg;
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/external/valgrind/main/VEX/priv/ |
host_generic_regs.c | 167 vpanic("addToHRegMap: orig is not a vreg"); 169 vpanic("addToHRegMap: replacement is a vreg");
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