| /prebuilts/ndk/9/platforms/android-16/arch-x86/usr/include/asm/ |
| alternative_32.h | 36 #define alternative(oldinstr, newinstr, feature) asm volatile ("661:\n\t" oldinstr "\n662:\n" ".section .altinstructions,\"a\"\n" " .align 4\n" " .long 661b\n" " .long 663f\n" " .byte %c0\n" " .byte 662b-661b\n" " .byte 664f-663f\n" ".previous\n" ".section .altinstr_replacement,\"ax\"\n" "663:\n\t" newinstr "\n664:\n" ".previous" :: "i" (feature) : "memory")
37 #define alternative_input(oldinstr, newinstr, feature, input...) asm volatile ("661:\n\t" oldinstr "\n662:\n" ".section .altinstructions,\"a\"\n" " .align 4\n" " .long 661b\n" " .long 663f\n" " .byte %c0\n" " .byte 662b-661b\n" " .byte 664f-663f\n" ".previous\n" ".section .altinstr_replacement,\"ax\"\n" "663:\n\t" newinstr "\n664:\n" ".previous" :: "i" (feature), ##input)
39 #define alternative_io(oldinstr, newinstr, feature, output, input...) asm volatile ("661:\n\t" oldinstr "\n662:\n" ".section .altinstructions,\"a\"\n" " .align 4\n" " .long 661b\n" " .long 663f\n" " .byte %c[feat]\n" " .byte 662b-661b\n" " .byte 664f-663f\n" ".previous\n" ".section .altinstr_replacement,\"ax\"\n" "663:\n\t" newinstr "\n664:\n" ".previous" : output : [feat] "i" (feature), ##input)
|
| /prebuilts/ndk/9/platforms/android-17/arch-x86/usr/include/asm/ |
| alternative_32.h | 36 #define alternative(oldinstr, newinstr, feature) asm volatile ("661:\n\t" oldinstr "\n662:\n" ".section .altinstructions,\"a\"\n" " .align 4\n" " .long 661b\n" " .long 663f\n" " .byte %c0\n" " .byte 662b-661b\n" " .byte 664f-663f\n" ".previous\n" ".section .altinstr_replacement,\"ax\"\n" "663:\n\t" newinstr "\n664:\n" ".previous" :: "i" (feature) : "memory")
37 #define alternative_input(oldinstr, newinstr, feature, input...) asm volatile ("661:\n\t" oldinstr "\n662:\n" ".section .altinstructions,\"a\"\n" " .align 4\n" " .long 661b\n" " .long 663f\n" " .byte %c0\n" " .byte 662b-661b\n" " .byte 664f-663f\n" ".previous\n" ".section .altinstr_replacement,\"ax\"\n" "663:\n\t" newinstr "\n664:\n" ".previous" :: "i" (feature), ##input)
39 #define alternative_io(oldinstr, newinstr, feature, output, input...) asm volatile ("661:\n\t" oldinstr "\n662:\n" ".section .altinstructions,\"a\"\n" " .align 4\n" " .long 661b\n" " .long 663f\n" " .byte %c[feat]\n" " .byte 662b-661b\n" " .byte 664f-663f\n" ".previous\n" ".section .altinstr_replacement,\"ax\"\n" "663:\n\t" newinstr "\n664:\n" ".previous" : output : [feat] "i" (feature), ##input)
|
| /prebuilts/ndk/9/platforms/android-18/arch-x86/usr/include/asm/ |
| alternative_32.h | 36 #define alternative(oldinstr, newinstr, feature) asm volatile ("661:\n\t" oldinstr "\n662:\n" ".section .altinstructions,\"a\"\n" " .align 4\n" " .long 661b\n" " .long 663f\n" " .byte %c0\n" " .byte 662b-661b\n" " .byte 664f-663f\n" ".previous\n" ".section .altinstr_replacement,\"ax\"\n" "663:\n\t" newinstr "\n664:\n" ".previous" :: "i" (feature) : "memory")
37 #define alternative_input(oldinstr, newinstr, feature, input...) asm volatile ("661:\n\t" oldinstr "\n662:\n" ".section .altinstructions,\"a\"\n" " .align 4\n" " .long 661b\n" " .long 663f\n" " .byte %c0\n" " .byte 662b-661b\n" " .byte 664f-663f\n" ".previous\n" ".section .altinstr_replacement,\"ax\"\n" "663:\n\t" newinstr "\n664:\n" ".previous" :: "i" (feature), ##input)
39 #define alternative_io(oldinstr, newinstr, feature, output, input...) asm volatile ("661:\n\t" oldinstr "\n662:\n" ".section .altinstructions,\"a\"\n" " .align 4\n" " .long 661b\n" " .long 663f\n" " .byte %c[feat]\n" " .byte 662b-661b\n" " .byte 664f-663f\n" ".previous\n" ".section .altinstr_replacement,\"ax\"\n" "663:\n\t" newinstr "\n664:\n" ".previous" : output : [feat] "i" (feature), ##input)
|
| /prebuilts/ndk/9/platforms/android-19/arch-x86/usr/include/asm/ |
| alternative_32.h | 36 #define alternative(oldinstr, newinstr, feature) asm volatile ("661:\n\t" oldinstr "\n662:\n" ".section .altinstructions,\"a\"\n" " .align 4\n" " .long 661b\n" " .long 663f\n" " .byte %c0\n" " .byte 662b-661b\n" " .byte 664f-663f\n" ".previous\n" ".section .altinstr_replacement,\"ax\"\n" "663:\n\t" newinstr "\n664:\n" ".previous" :: "i" (feature) : "memory")
37 #define alternative_input(oldinstr, newinstr, feature, input...) asm volatile ("661:\n\t" oldinstr "\n662:\n" ".section .altinstructions,\"a\"\n" " .align 4\n" " .long 661b\n" " .long 663f\n" " .byte %c0\n" " .byte 662b-661b\n" " .byte 664f-663f\n" ".previous\n" ".section .altinstr_replacement,\"ax\"\n" "663:\n\t" newinstr "\n664:\n" ".previous" :: "i" (feature), ##input)
39 #define alternative_io(oldinstr, newinstr, feature, output, input...) asm volatile ("661:\n\t" oldinstr "\n662:\n" ".section .altinstructions,\"a\"\n" " .align 4\n" " .long 661b\n" " .long 663f\n" " .byte %c[feat]\n" " .byte 662b-661b\n" " .byte 664f-663f\n" ".previous\n" ".section .altinstr_replacement,\"ax\"\n" "663:\n\t" newinstr "\n664:\n" ".previous" : output : [feat] "i" (feature), ##input)
|
| /prebuilts/ndk/9/platforms/android-9/arch-x86/usr/include/asm/ |
| alternative_32.h | 36 #define alternative(oldinstr, newinstr, feature) asm volatile ("661:\n\t" oldinstr "\n662:\n" ".section .altinstructions,\"a\"\n" " .align 4\n" " .long 661b\n" " .long 663f\n" " .byte %c0\n" " .byte 662b-661b\n" " .byte 664f-663f\n" ".previous\n" ".section .altinstr_replacement,\"ax\"\n" "663:\n\t" newinstr "\n664:\n" ".previous" :: "i" (feature) : "memory")
37 #define alternative_input(oldinstr, newinstr, feature, input...) asm volatile ("661:\n\t" oldinstr "\n662:\n" ".section .altinstructions,\"a\"\n" " .align 4\n" " .long 661b\n" " .long 663f\n" " .byte %c0\n" " .byte 662b-661b\n" " .byte 664f-663f\n" ".previous\n" ".section .altinstr_replacement,\"ax\"\n" "663:\n\t" newinstr "\n664:\n" ".previous" :: "i" (feature), ##input)
39 #define alternative_io(oldinstr, newinstr, feature, output, input...) asm volatile ("661:\n\t" oldinstr "\n662:\n" ".section .altinstructions,\"a\"\n" " .align 4\n" " .long 661b\n" " .long 663f\n" " .byte %c[feat]\n" " .byte 662b-661b\n" " .byte 664f-663f\n" ".previous\n" ".section .altinstr_replacement,\"ax\"\n" "663:\n\t" newinstr "\n664:\n" ".previous" : output : [feat] "i" (feature), ##input)
|
| /prebuilts/misc/common/swig/include/2.0.11/ |
| swig.swg | 45 #define %readonly %warn "114:%readonly is deprecated. Use %immutable; " %feature("immutable");
46 #define %readwrite %warn "115:%readwrite is deprecated. Use %mutable; " %feature("immutable","");
48 #define %immutable %feature("immutable")
49 #define %noimmutable %feature("immutable","0")
50 #define %clearimmutable %feature("immutable","")
54 #define %nodefault %feature("nodefault","1")
55 #define %default %feature("nodefault","0")
56 #define %clearnodefault %feature("nodefault","")
60 #define %nodefaultctor %feature("nodefaultctor","1")
61 #define %defaultctor %feature("nodefaultctor","0"
[all...] |
| /libcore/luni/src/main/java/org/apache/harmony/xml/dom/ |
| DOMImplementationImpl.java | 52 public boolean hasFeature(String feature, String version) {
54 if (feature.startsWith("+")) {
55 feature = feature.substring(1);
62 if (feature.equalsIgnoreCase("Core")) {
64 } else if (feature.equalsIgnoreCase("XML")) {
66 } else if (feature.equalsIgnoreCase("XMLVersion")) {
87 public Object getFeature(String feature, String version) {
88 return hasFeature(feature, version) ? this : null;
|
| /external/chromium_org/third_party/harfbuzz-ng/src/ |
| hb-shape.cc | 82 parse_feature_value_prefix (const char **pp, const char *end, hb_feature_t *feature)
85 feature->value = 0;
88 feature->value = 1;
95 parse_feature_tag (const char **pp, const char *end, hb_feature_t *feature)
110 feature->tag = hb_tag_from_string (p, *pp - p);
115 parse_feature_indices (const char **pp, const char *end, hb_feature_t *feature)
121 feature->start = 0;
122 feature->end = (unsigned int) -1;
127 has_start = parse_uint (pp, end, &feature->start);
130 parse_uint (pp, end, &feature->end)
[all...] |
| /external/llvm/test/MC/Mips/mips5/ |
| invalid-mips64.s | 8 clo $11,$a1 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
9 clz $sp,$gp # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
10 dclo $s2,$a2 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
11 dclz $s0,$25 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
12 deret # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
13 jr.hb $4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
14 jalr.hb $4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
15 jalr.hb $4, $5 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
16 madd $s6,$13 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
17 madd $zero,$9 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enable
[all...] |
| /prebuilts/tools/common/m2/repository/org/codehaus/gmaven/feature/gmaven-feature-support/1.5/ |
| gmaven-feature-support-1.5.jar | |
| /external/llvm/test/MC/Mips/mips4/ |
| invalid-mips64r2.s | 8 clo $t3,$a1 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
9 clz $sp,$gp # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
10 dclo $s2,$a2 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
11 dclz $s0,$t9 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
12 deret # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
13 di $s8 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
14 dsbh $v1,$t6 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
15 dshd $v0,$sp # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
16 ei $t6 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
17 luxc1 $f19,$s6($s5) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enable
[all...] |
| /prebuilts/tools/common/m2/repository/org/codehaus/gmaven/feature/gmaven-feature-api/1.5/ |
| gmaven-feature-api-1.5.jar | |
| /external/llvm/test/MC/Mips/mips64/ |
| invalid-mips64r2.s | 8 di $s8 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
9 drotr $1,15 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
10 drotr $1,$14,15 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
11 drotr32 $1,15 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
12 drotr32 $1,$14,15 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
13 drotrv $1,$14,$15 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
14 dsbh $v1,$14 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
15 dshd $v0,$sp # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
16 ei $14 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
17 madd.s $f1,$f31,$f19,$f25 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enable
[all...] |
| /external/llvm/test/MC/Mips/mips64r6/ |
| invalid-mips64.s | 8 addi $13,$9,26322 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
9 bgezal $0, 21100 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
10 bgezal $6, 21100 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
11 bltzal $6, 21100 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
12 daddi $sp,$s4,-27705 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
13 daddi $sp,-27705 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
14 dadd $sp,$s4,-27705 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
15 dadd $sp,-27705 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
16 dmult $s7,$s4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
17 dmultu $a1,$a2 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enable
[all...] |
| invalid-mips2.s | 8 addi $13,$9,26322 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
9 bgezal $0, 21100 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
10 bgezal $6, 21100 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
11 bltzal $6, 21100 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
12 mfhi $s3 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
13 mfhi $sp # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
14 mflo $s1 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
15 mthi $s1 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
16 mtlo $25 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
17 mtlo $sp # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enable
[all...] |
| /external/llvm/test/MC/Mips/mips2/ |
| invalid-mips3.s | 8 ceil.l.d $f1,$f3 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
9 ceil.l.s $f18,$f13 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
10 cvt.d.l $f4,$f16 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
11 cvt.l.d $f24,$f15 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
12 cvt.l.s $f11,$f29 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
13 cvt.s.l $f15,$f30 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
14 dadd $s3,$at,$ra # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
15 daddi $sp,$s4,-27705 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
16 daddiu $k0,$s6,-4586 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
17 daddu $s3,$at,$ra # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enable
[all...] |
| invalid-mips5.s | 10 ceil.l.d $f1,$f3 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
11 ceil.l.s $f18,$f13 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
12 cvt.d.l $f4,$f16 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
13 cvt.l.d $f24,$f15 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
14 cvt.l.s $f11,$f29 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
15 cvt.s.l $f15,$f30 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
16 dadd $s3,$at,$ra # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
17 daddi $sp,$s4,-27705 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
18 daddiu $k0,$s6,-4586 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
19 daddu $s3,$at,$ra # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enable
[all...] |
| invalid-mips4.s | 10 ceil.l.d $f1,$f3 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
11 ceil.l.s $f18,$f13 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
12 cvt.d.l $f4,$f16 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
13 cvt.l.d $f24,$f15 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
14 cvt.l.s $f11,$f29 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
15 cvt.s.l $f15,$f30 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
16 dadd $s3,$at,$ra # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
17 daddi $sp,$s4,-27705 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
18 daddiu $k0,$s6,-4586 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
19 daddu $s3,$at,$ra # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enable
[all...] |
| /cts/tests/tests/tv/src/android/tv/settings/cts/ |
| Utils.java | 25 public static boolean hasFeature(Context context, String feature) {
26 return context.getPackageManager().hasSystemFeature(feature);
|
| /external/lldb/scripts/Python/interface/ |
| SBWatchpoint.i | 12 %feature("docstring",
40 %feature("docstring", "
69 %feature("docstring", "
77 %feature("docstring", "
|
| /external/llvm/test/MC/Mips/mips32/ |
| invalid-mips32r2.s | 8 cvt.l.d $f24,$f15 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
9 cvt.l.s $f11,$f29 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
10 di $s8 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
11 ei $t6 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
12 ldxc1 $f8,$s7($t7) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
13 luxc1 $f19,$s6($s5) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
14 lwxc1 $f12,$s1($s8) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
15 madd.d $f18,$f19,$f26,$f20 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
16 madd.s $f1,$f31,$f19,$f25 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
17 mfhc1 $s8,$f24 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enable
[all...] |
| /external/llvm/test/MC/Mips/mips32r6/ |
| invalid-mips1.s | 8 addi $13,$9,26322 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
9 c.ngl.d $f29,$f29 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
10 c.ngle.d $f0,$f16 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
11 c.sf.d $f30,$f0 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
12 c.sf.s $f14,$f22 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
13 mfhi $s3 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
14 mfhi $sp # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
15 mflo $s1 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
16 mthi $s1 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
17 mtlo $25 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enable
[all...] |
| /external/llvm/test/MC/Mips/mips1/ |
| invalid-mips5.s | 10 ceil.l.d $f1,$f3 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
11 ceil.l.s $f18,$f13 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
12 ceil.w.d $f11,$f25 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
13 ceil.w.s $f6,$f20 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
14 cvt.d.l $f4,$f16 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
15 cvt.l.d $f24,$f15 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
16 cvt.l.s $f11,$f29 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
17 cvt.s.l $f15,$f30 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
18 dadd $s3,$at,$ra # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
19 daddi $sp,$s4,-27705 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enable
[all...] |
| invalid-mips3.s | 8 dmult $s7,$9 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
9 dsub $a3,$s6,$8 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
10 ceil.l.d $f1,$f3 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
11 ceil.l.s $f18,$f13 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
12 ceil.w.d $f11,$f25 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
13 ceil.w.s $f6,$f20 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
14 cvt.d.l $f4,$f16 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
15 cvt.l.d $f24,$f15 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
16 cvt.l.s $f11,$f29 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
17 cvt.s.l $f15,$f30 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enable
[all...] |
| invalid-mips4.s | 10 ceil.l.d $f1,$f3 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
11 ceil.l.s $f18,$f13 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
12 ceil.w.d $f11,$f25 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
13 ceil.w.s $f6,$f20 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
14 cvt.d.l $f4,$f16 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
15 cvt.l.d $f24,$f15 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
16 cvt.l.s $f11,$f29 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
17 cvt.s.l $f15,$f30 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
18 dadd $s3,$at,$ra # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
19 daddi $sp,$s4,-27705 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enable
[all...] |
