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  /external/chromium_org/third_party/mesa/src/src/mesa/drivers/dri/i965/
brw_fs_schedule_instructions.cpp 280 add_dep(last_grf_write[inst->src[i].reg], n);
308 add_dep(last_grf_write[inst->dst.reg], n);
309 last_grf_write[inst->dst.reg] = n;
311 int reg = inst->dst.reg & ~BRW_MRF_COMPR4; local
313 add_dep(last_mrf_write[reg], n);
314 last_mrf_write[reg] = n;
316 if (inst->dst.reg & BRW_MRF_COMPR4)
317 reg += 4;
319 reg++
395 int reg = inst->dst.reg & ~BRW_MRF_COMPR4; local
    [all...]
  /external/mesa3d/src/gallium/drivers/svga/
svga_tgsi_decl_sm30.c 95 * For example, if usage = SVGA3D_DECLUSAGE_TEXCOORD, reg.num = 1, and
100 SVGA3dShaderDestToken reg,
115 dcl.dst = reg;
132 SVGA3dShaderDestToken reg = local
135 if (!emit_decl( emit, reg, 0, 0 ))
152 struct src_register reg; local
162 reg = src_register( SVGA3DREG_INPUT,
165 *out = emit->ps_depth_fog = reg;
169 return emit_decl( emit, dst( reg ), SVGA3D_DECLUSAGE_TEXCOORD, 0 );
183 SVGA3dShaderDestToken reg; local
402 SVGA3dShaderDestToken reg; local
    [all...]
  /external/mesa3d/src/mesa/drivers/dri/i965/
brw_fs_schedule_instructions.cpp 280 add_dep(last_grf_write[inst->src[i].reg], n);
308 add_dep(last_grf_write[inst->dst.reg], n);
309 last_grf_write[inst->dst.reg] = n;
311 int reg = inst->dst.reg & ~BRW_MRF_COMPR4; local
313 add_dep(last_mrf_write[reg], n);
314 last_mrf_write[reg] = n;
316 if (inst->dst.reg & BRW_MRF_COMPR4)
317 reg += 4;
319 reg++
395 int reg = inst->dst.reg & ~BRW_MRF_COMPR4; local
    [all...]
  /art/compiler/utils/x86_64/
assembler_x86_64.h 99 bool IsRegister(CpuRegister reg) const {
101 && ((encoding_[0] & 0x07) == reg.LowBits()) // Register codes match.
102 && (reg.NeedsRex() == ((rex_ & 1) != 0)); // REX.000B bits match.
149 explicit Operand(CpuRegister reg) : rex_(0), length_(0) { SetModRM(3, reg); }
262 void call(CpuRegister reg);
266 void pushq(CpuRegister reg);
270 void popq(CpuRegister reg);
379 void xchgl(CpuRegister reg, const Address& address);
381 void cmpl(CpuRegister reg, const Immediate& imm)
    [all...]
  /external/chromium_org/third_party/yasm/source/patched-yasm/modules/arch/x86/
x86expr.c 35 int *regs; /* total multiplier for each reg */
50 switch ((x86_expritem_reg_size)(ei->data.reg & ~0xFUL)) {
54 *regnum = (unsigned int)(ei->data.reg & 0xF);
59 *regnum = (unsigned int)(ei->data.reg & 0xF);
64 if (data->bits != 64 && (ei->data.reg & 0x8) == 0x8)
66 *regnum = 17+(unsigned int)(ei->data.reg & 0xF);
71 if (data->bits != 64 && (ei->data.reg & 0x8) == 0x8)
73 *regnum = 17+(unsigned int)(ei->data.reg & 0xF);
93 int bx, si, di, bp; /* total multiplier for each reg */
114 if ((ei->data.reg & ~0xFUL) != X86_REG16
267 int *reg; local
    [all...]
  /external/chromium_org/third_party/mesa/src/src/gallium/drivers/nv50/codegen/
nv50_ir_peephole.cpp 43 if (defExists(0) && def(0).rep()->reg.data.id < 0) {
45 if (def(d).rep()->reg.data.id >= 0)
70 if (getDef(d)->refCount() || getDef(d)->reg.data.id >= 0)
106 if (mov->getDef(0)->reg.data.id < 0 && si && si->op != OP_PHI) {
320 switch (imm.reg.type) {
323 imm.reg.data.f32 = fabsf(imm.reg.data.f32);
325 imm.reg.data.f32 = -imm.reg.data.f32;
327 if (imm.reg.data.f32 < 0.0f
    [all...]
nv50_ir_inlines.h 135 return value ? value->reg.file : FILE_NULL;
140 return value ? value->reg.size : 0;
157 return value ? value->reg.file : FILE_NULL;
162 return value ? value->reg.size : 0;
194 if (reg.data.id < 0) {
307 if (reg.file >= FILE_GPR && reg.file <= FILE_ADDRESS)
314 if (reg.file >= FILE_MEMORY_CONST)
321 if (reg.file >= FILE_MEMORY_CONST)
328 reg.data.offset = offset
    [all...]
  /external/mesa3d/src/gallium/drivers/nv50/codegen/
nv50_ir_peephole.cpp 43 if (defExists(0) && def(0).rep()->reg.data.id < 0) {
45 if (def(d).rep()->reg.data.id >= 0)
70 if (getDef(d)->refCount() || getDef(d)->reg.data.id >= 0)
106 if (mov->getDef(0)->reg.data.id < 0 && si && si->op != OP_PHI) {
320 switch (imm.reg.type) {
323 imm.reg.data.f32 = fabsf(imm.reg.data.f32);
325 imm.reg.data.f32 = -imm.reg.data.f32;
327 if (imm.reg.data.f32 < 0.0f
    [all...]
nv50_ir_inlines.h 135 return value ? value->reg.file : FILE_NULL;
140 return value ? value->reg.size : 0;
157 return value ? value->reg.file : FILE_NULL;
162 return value ? value->reg.size : 0;
194 if (reg.data.id < 0) {
307 if (reg.file >= FILE_GPR && reg.file <= FILE_ADDRESS)
314 if (reg.file >= FILE_MEMORY_CONST)
321 if (reg.file >= FILE_MEMORY_CONST)
328 reg.data.offset = offset
    [all...]
  /external/chromium_org/third_party/mesa/src/src/gallium/drivers/r600/
r600_pipe.h 697 static INLINE void r600_store_config_reg_seq(struct r600_command_buffer *cb, unsigned reg, unsigned num)
699 assert(reg < R600_CONTEXT_REG_OFFSET);
702 cb->buf[cb->atom.num_dw++] = (reg - R600_CONFIG_REG_OFFSET) >> 2;
709 static INLINE void r600_store_context_reg_seq(struct r600_command_buffer *cb, unsigned reg, unsigned num)
711 assert(reg >= R600_CONTEXT_REG_OFFSET && reg < R600_CTL_CONST_OFFSET);
714 cb->buf[cb->atom.num_dw++] = (reg - R600_CONTEXT_REG_OFFSET) >> 2;
721 static INLINE void r600_store_ctl_const_seq(struct r600_command_buffer *cb, unsigned reg, unsigned num)
723 assert(reg >= R600_CTL_CONST_OFFSET);
726 cb->buf[cb->atom.num_dw++] = (reg - R600_CTL_CONST_OFFSET) >> 2
    [all...]
  /external/lldb/source/Plugins/Process/Utility/
RegisterContextDarwin_i386.cpp 216 #define GPR_OFFSET(reg) (LLVM_EXTENSION offsetof (RegisterContextDarwin_i386::GPR, reg))
217 #define FPU_OFFSET(reg) (LLVM_EXTENSION offsetof (RegisterContextDarwin_i386::FPU, reg) + sizeof (RegisterContextDarwin_i386::GPR))
218 #define EXC_OFFSET(reg) (LLVM_EXTENSION offsetof (RegisterContextDarwin_i386::EXC, reg) + sizeof (RegisterContextDarwin_i386::GPR) + sizeof (RegisterContextDarwin_i386::FPU))
224 #define DEFINE_GPR(reg, alt) #reg, alt, sizeof(((RegisterContextDarwin_i386::GPR *)NULL)->reg), GPR_OFFSET(reg), eEncodingUint, eFormatHe
446 uint32_t reg = gpr_eax + i; local
563 const uint32_t reg = reg_info->kinds[eRegisterKindLLDB]; local
683 const uint32_t reg = reg_info->kinds[eRegisterKindLLDB]; local
    [all...]
  /external/mesa3d/src/gallium/drivers/r600/
r600_pipe.h 697 static INLINE void r600_store_config_reg_seq(struct r600_command_buffer *cb, unsigned reg, unsigned num)
699 assert(reg < R600_CONTEXT_REG_OFFSET);
702 cb->buf[cb->atom.num_dw++] = (reg - R600_CONFIG_REG_OFFSET) >> 2;
709 static INLINE void r600_store_context_reg_seq(struct r600_command_buffer *cb, unsigned reg, unsigned num)
711 assert(reg >= R600_CONTEXT_REG_OFFSET && reg < R600_CTL_CONST_OFFSET);
714 cb->buf[cb->atom.num_dw++] = (reg - R600_CONTEXT_REG_OFFSET) >> 2;
721 static INLINE void r600_store_ctl_const_seq(struct r600_command_buffer *cb, unsigned reg, unsigned num)
723 assert(reg >= R600_CTL_CONST_OFFSET);
726 cb->buf[cb->atom.num_dw++] = (reg - R600_CTL_CONST_OFFSET) >> 2
    [all...]
  /external/chromium_org/v8/src/
regexp-macro-assembler-tracer.cc 113 void RegExpMacroAssemblerTracer::AdvanceRegister(int reg, int by) {
114 PrintF(" AdvanceRegister(register=%d, by=%d);\n", reg, by);
115 assembler_->AdvanceRegister(reg, by);
131 void RegExpMacroAssemblerTracer::WriteCurrentPositionToRegister(int reg,
134 reg,
136 assembler_->WriteCurrentPositionToRegister(reg, cp_offset);
146 void RegExpMacroAssemblerTracer::ReadCurrentPositionFromRegister(int reg) {
147 PrintF(" ReadCurrentPositionFromRegister(register=%d);\n", reg);
148 assembler_->ReadCurrentPositionFromRegister(reg);
152 void RegExpMacroAssemblerTracer::WriteStackPointerToRegister(int reg) {
    [all...]
regexp-macro-assembler-irregexp.h 46 virtual void AdvanceRegister(int reg, int by); // r[reg] += by.
49 virtual void WriteCurrentPositionToRegister(int reg, int cp_offset);
51 virtual void ReadCurrentPositionFromRegister(int reg);
52 virtual void WriteStackPointerToRegister(int reg);
53 virtual void ReadStackPointerFromRegister(int reg);
  /external/pixman/pixman/
pixman-region.c 72 #define PIXREGION_NIL(reg) ((reg)->data && !(reg)->data->numRects)
74 #define PIXREGION_NAR(reg) ((reg)->data == pixman_broken_data)
75 #define PIXREGION_NUMRECTS(reg) ((reg)->data ? (reg)->data->numRects : 1)
76 #define PIXREGION_SIZE(reg) ((reg)->data ? (reg)->data->size : 0
1573 region_type_t reg; member in struct:__anon32566
1587 region_type_t *reg; \/* ri[j].reg *\/ local
    [all...]
  /dalvik/dexgen/src/com/android/dexgen/dex/code/form/
Form21c.java 77 RegisterSpec reg; local
81 reg = regs.get(0);
89 reg = regs.get(0);
90 if (reg.getReg() != regs.get(1).getReg()) {
100 if (!unsignedFitsInByte(reg.getReg())) {
  /dalvik/dx/src/com/android/dx/dex/code/form/
Form21c.java 78 RegisterSpec reg; local
82 reg = regs.get(0);
90 reg = regs.get(0);
91 if (reg.getReg() != regs.get(1).getReg()) {
101 if (!unsignedFitsInByte(reg.getReg())) {
Form31c.java 78 RegisterSpec reg; local
82 reg = regs.get(0);
90 reg = regs.get(0);
91 if (reg.getReg() != regs.get(1).getReg()) {
101 if (!unsignedFitsInByte(reg.getReg())) {
  /external/dexmaker/src/dx/java/com/android/dx/dex/code/form/
Form21c.java 79 RegisterSpec reg; local
83 reg = regs.get(0);
91 reg = regs.get(0);
92 if (reg.getReg() != regs.get(1).getReg()) {
102 if (!unsignedFitsInByte(reg.getReg())) {
Form31c.java 79 RegisterSpec reg; local
83 reg = regs.get(0);
91 reg = regs.get(0);
92 if (reg.getReg() != regs.get(1).getReg()) {
102 if (!unsignedFitsInByte(reg.getReg())) {
Form41c.java 82 RegisterSpec reg; local
86 reg = regs.get(0);
94 reg = regs.get(0);
95 if (reg.getReg() != regs.get(1).getReg()) {
105 if (!unsignedFitsInShort(reg.getReg())) {
  /hardware/qcom/msm8960/original-kernel-headers/linux/mfd/
msm-adie-codec.h 51 #define ADIE_CODEC_PACK_ENTRY(reg, mask, val) ((val)|(mask << 8)|(reg << 16))
53 #define ADIE_CODEC_UNPACK_ENTRY(packed, reg, mask, val) \
55 ((reg) = ((packed >> 16) & (0xff))); \
82 u8 reg; member in struct:adie_codec_register
  /hardware/qcom/msm8x74/original-kernel-headers/linux/mfd/
msm-adie-codec.h 51 #define ADIE_CODEC_PACK_ENTRY(reg, mask, val) ((val)|(mask << 8)|(reg << 16))
53 #define ADIE_CODEC_UNPACK_ENTRY(packed, reg, mask, val) \
55 ((reg) = ((packed >> 16) & (0xff))); \
82 u8 reg; member in struct:adie_codec_register
  /hardware/qcom/msm8x84/original-kernel-headers/linux/mfd/
msm-adie-codec.h 51 #define ADIE_CODEC_PACK_ENTRY(reg, mask, val) ((val)|(mask << 8)|(reg << 16))
53 #define ADIE_CODEC_UNPACK_ENTRY(packed, reg, mask, val) \
55 ((reg) = ((packed >> 16) & (0xff))); \
82 u8 reg; member in struct:adie_codec_register
  /system/core/debuggerd/arm/
machine.cpp 38 for (int reg = 0; reg < 14; reg++) {
40 uintptr_t addr = regs.uregs[reg];
48 _LOG(log, logtype::MEMORY, "\nmemory near %.2s:\n", &REG_NAMES[reg * 2]);

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