| /system/core/debuggerd/arm64/ |
| machine.cpp | 42 for (int reg = 0; reg < 31; reg++) {
43 uintptr_t addr = regs.regs[reg];
53 _LOG(log, logtype::MEMORY, "\nmemory near x%d:\n", reg);
|
| /art/compiler/utils/x86/ |
| assembler_x86.h | 83 bool IsRegister(Register reg) const {
85 && ((encoding_[0] & 0x07) == reg); // Register codes match.
121 explicit Operand(Register reg) { SetModRM(3, reg); }
220 void call(Register reg);
225 void pushl(Register reg);
229 void popl(Register reg);
338 void xchgl(Register reg, const Address& address);
340 void cmpl(Register reg, const Immediate& imm);
342 void cmpl(Register reg, const Address& address)
[all...] |
| /art/compiler/dex/quick/ |
| gen_invoke.cc | 377 rl_src.reg = TargetReg(kArg0, kRef);
383 StoreRefDisp(TargetPtrReg(kSp), 0, rl_src.reg, kNotVolatile);
406 RegStorage reg = GetArgMappingToPhysicalReg(i); local
408 if (reg.Valid()) {
413 OpRegCopy(RegStorage::Solo32(v_map->core_reg), reg);
416 OpRegCopy(RegStorage::Solo32(v_map->fp_reg), reg);
446 Store32Disp(TargetPtrReg(kSp), SRegOffset(start_vreg + i), reg);
522 // TUNING: we can save a reg copy if Method* has been promoted.
787 RegStorage reg; local
791 if (rl_arg.reg.IsPair())
814 Store32Disp(TargetPtrReg(kSp), (next_use + 1) * 4, reg); local
[all...] |
| mir_to_lir-inl.h | 143 inline void Mir2Lir::SetupRegMask(ResourceMask* mask, int reg) {
144 DCHECK_EQ((reg & ~RegStorage::kRegValMask), 0);
145 DCHECK(reginfo_map_.Get(reg) != nullptr) << "No info for 0x" << reg;
146 *mask = mask->Union(reginfo_map_.Get(reg)->DefUseMask());
152 inline void Mir2Lir::ClearRegMask(ResourceMask* mask, int reg) {
153 DCHECK_EQ((reg & ~RegStorage::kRegValMask), 0);
154 DCHECK(reginfo_map_.Get(reg) != nullptr) << "No info for 0x" << reg;
155 *mask = mask->ClearBits(reginfo_map_.Get(reg)->DefUseMask())
[all...] |
| /external/chromium_org/third_party/mesa/src/src/gallium/drivers/nv50/codegen/ |
| nv50_ir_ra.cpp | 44 bool assign(int32_t& reg, DataFile f, unsigned int size);
45 void release(DataFile f, int32_t reg, unsigned int size);
46 bool occupy(DataFile f, int32_t reg, unsigned int size);
48 void occupyMask(DataFile f, int32_t reg, uint8_t mask);
66 return v->reg.data.id * MIN2(v->reg.size, 4);
70 return units(v->reg.file, idToBytes(v));
74 if (v->reg.size < 4)
75 return units(v->reg.file, bytes);
148 RegisterSet::assign(int32_t& reg, DataFile f, unsigned int size
647 int32_t reg; member in class:nv50_ir::GCRA::RIG_Node
789 Value *reg = reinterpret_cast<Value *>(it.get())->asLValue(); local
1611 unsigned int reg = regs.idToBytes(split->getSrc(0)); local
1625 unsigned int reg = regs.idToBytes(merge->getDef(0)); local
[all...] |
| /external/mesa3d/src/gallium/drivers/nv50/codegen/ |
| nv50_ir_ra.cpp | 44 bool assign(int32_t& reg, DataFile f, unsigned int size);
45 void release(DataFile f, int32_t reg, unsigned int size);
46 bool occupy(DataFile f, int32_t reg, unsigned int size);
48 void occupyMask(DataFile f, int32_t reg, uint8_t mask);
66 return v->reg.data.id * MIN2(v->reg.size, 4);
70 return units(v->reg.file, idToBytes(v));
74 if (v->reg.size < 4)
75 return units(v->reg.file, bytes);
148 RegisterSet::assign(int32_t& reg, DataFile f, unsigned int size
647 int32_t reg; member in class:nv50_ir::GCRA::RIG_Node
789 Value *reg = reinterpret_cast<Value *>(it.get())->asLValue(); local
1611 unsigned int reg = regs.idToBytes(split->getSrc(0)); local
1625 unsigned int reg = regs.idToBytes(merge->getDef(0)); local
[all...] |
| /external/libunwind/src/aarch64/ |
| Gresume.c | 138 int reg; local
142 for (reg = 0; reg <= UNW_AARCH64_PSTATE; ++reg)
144 Debug (16, "copying %s %d\n", unw_regname (reg), reg);
145 if (unw_is_fpreg (reg))
147 if (tdep_access_fpreg (c, reg, &fpval, 0) >= 0)
148 as->acc.access_fpreg (as, reg, &fpval, 1, arg);
152 if (tdep_access_reg (c, reg, &val, 0) >= 0
[all...] |
| /frameworks/base/core/java/android/os/ |
| Broadcaster.java | 60 Registration reg = new Registration(); local
61 reg.senderWhat = senderWhat;
62 reg.targets = new Handler[1];
63 reg.targetWhats = new int[1];
64 reg.next = r;
65 reg.prev = r.prev;
66 r.prev.next = reg;
67 r.prev = reg;
69 if (r == mReg && r.senderWhat > reg.senderWhat) {
70 mReg = reg;
[all...] |
| /art/compiler/optimizing/ |
| code_generator_x86_64.h | 66 virtual void SpillScratch(int reg) OVERRIDE;
67 virtual void RestoreScratch(int reg) OVERRIDE;
72 void Exchange32(CpuRegister reg, int mem);
74 void Exchange64(CpuRegister reg, int mem);
112 void LoadCurrentMethod(CpuRegister reg);
172 virtual void DumpCoreRegister(std::ostream& stream, int reg) const OVERRIDE;
173 virtual void DumpFloatingPointRegister(std::ostream& stream, int reg) const OVERRIDE;
|
| /external/lldb/source/Plugins/Process/POSIX/ |
| RegisterContextLinux_x86_64.cpp | 21 #define UPDATE_GPR_INFO(reg) \
23 GetRegisterContext()[gpr_##reg].byte_size = sizeof(GPR::reg); \
24 GetRegisterContext()[gpr_##reg].byte_offset = GPR_OFFSET(reg); \
27 #define UPDATE_I386_GPR_INFO(i386_reg, reg) \
29 GetRegisterContext()[gpr_##i386_reg].byte_offset = GPR_OFFSET(reg); \
|
| /external/valgrind/main/VEX/priv/ |
| host_generic_regs.h | 50 - Whether or not the register is a virtual reg.
73 UInt reg; member in struct:__anon35627
124 r.reg = regno | (((UInt)rc) << 28) | (virtual ? (1<<24) : 0);
129 UInt rc = r.reg;
136 return r.reg & 0x00FFFFFF;
140 return toBool(r.reg & (1<<24));
145 return toBool(r1.reg == r2.reg);
156 /*--- Recording register usage (for reg-alloc) ---*/
186 create duplicate entries -- each reg should only be mentioned once.
[all...] |
| /external/chromium_org/v8/src/x87/ |
| lithium-codegen-x87.h | 83 void X87Mov(X87Register reg, Operand src,
85 void X87Mov(Operand src, X87Register reg,
91 void X87LoadForUsage(X87Register reg);
93 void X87PrepareToWrite(X87Register reg) { x87_stack_.PrepareToWrite(reg); }
94 void X87CommitWrite(X87Register reg) { x87_stack_.CommitWrite(reg); }
96 void X87Fxch(X87Register reg, int other_slot = 0) {
97 x87_stack_.Fxch(reg, other_slot);
99 void X87Free(X87Register reg) {
[all...] |
| /art/compiler/dex/quick/arm64/ |
| codegen_arm64.h | 97 RegStorage TargetReg(SpecialTargetRegister reg) OVERRIDE;
116 ResourceMask GetRegMaskCommon(const RegStorage& reg) const OVERRIDE;
180 void GenDivZeroCheckWide(RegStorage reg) OVERRIDE;
206 LIR* OpCmpImmBranch(ConditionCode cond, RegStorage reg, int check_value, LIR* target) OVERRIDE;
208 LIR* OpDecAndBranch(ConditionCode c_code, RegStorage reg, LIR* target) OVERRIDE;
213 LIR* OpPcRelLoad(RegStorage reg, LIR* target) OVERRIDE;
265 * @param reg #RegStorage containing a Solo64 input register (e.g. @c x1 or @c d2).
266 * @return A Solo32 with the same register number as the @p reg (e.g. @c w1 or @c s2).
269 RegStorage As32BitReg(RegStorage reg) {
270 DCHECK(!reg.IsPair())
[all...] |
| /external/chromium_org/v8/src/x64/ |
| assembler-x64-inl.h | 85 void Assembler::emit_rex_64(Register reg, Register rm_reg) {
86 emit(0x48 | reg.high_bit() << 2 | rm_reg.high_bit());
90 void Assembler::emit_rex_64(XMMRegister reg, Register rm_reg) {
91 emit(0x48 | (reg.code() & 0x8) >> 1 | rm_reg.code() >> 3);
95 void Assembler::emit_rex_64(Register reg, XMMRegister rm_reg) {
96 emit(0x48 | (reg.code() & 0x8) >> 1 | rm_reg.code() >> 3);
100 void Assembler::emit_rex_64(Register reg, const Operand& op) {
101 emit(0x48 | reg.high_bit() << 2 | op.rex_);
105 void Assembler::emit_rex_64(XMMRegister reg, const Operand& op) {
106 emit(0x48 | (reg.code() & 0x8) >> 1 | op.rex_)
[all...] |
| /external/lzma/Asm/x86/ |
| AesOpt.asm | 21 MY_PROLOG macro reg:req
35 movdqa reg, [r1]
75 CBC_DEC_UPDATE macro reg, offs
76 pxor reg, xmm6
78 movdqa [rD + offs], reg
170 XOR_UPD_1 macro reg, offs
171 pxor reg, [rD + offs]
174 XOR_UPD_2 macro reg, offs
175 movdqa [rD + offs], reg
|
| /external/qemu/target-i386/ |
| misc_helper.c | 130 target_ulong helper_read_crN(CPUX86State *env, int reg)
135 void helper_write_crN(CPUX86State *env, int reg, target_ulong t0)
139 void helper_movl_drN_T0(CPUX86State *env, int reg, target_ulong t0)
143 target_ulong helper_read_crN(CPUX86State *env, int reg)
147 helper_svm_check_intercept_param(env, SVM_EXIT_READ_CR0 + reg, 0);
148 switch(reg) {
150 val = env->cr[reg];
163 void helper_write_crN(CPUX86State *env, int reg, target_ulong t0)
165 helper_svm_check_intercept_param(env, SVM_EXIT_WRITE_CR0 + reg, 0);
166 switch(reg) {
[all...] |
| /development/ndk/platforms/android-3/arch-arm/include/asm/arch/ |
| mux.h | 18 #define MUX_REG(reg, mode_offset, mode) .mux_reg = FUNC_MUX_CTRL_##reg, .mask_offset = mode_offset, .mask = mode,
20 #define PULL_REG(reg, bit, status) .pull_reg = PULL_DWN_CTRL_##reg, .pull_bit = bit, .pull_val = status,
22 #define PU_PD_REG(reg, status) .pu_pd_reg = PU_PD_SEL_##reg, .pu_pd_val = status,
24 #define MUX_REG_730(reg, mode_offset, mode) .mux_reg = OMAP730_IO_CONF_##reg, .mask_offset = mode_offset, .mask = mode,
26 #define PULL_REG_730(reg, bit, status) .pull_reg = OMAP730_IO_CONF_##reg, .pull_bit = bit, .pull_val = status
[all...] |
| /development/perftests/panorama/feature_stab/src/dbregtest/ |
| dbregtest.cpp | 134 db_FrameToReferenceRegistration reg; local
174 if ( !reg.Initialized() )
176 reg.Init(w,h,motion_model_type,DEFAULT_MAX_ITERATIONS,linear_polish,quarter_resolution,DB_POINT_STANDARDDEV,reference_update_period,do_motion_smoothing,motion_smoothing_gain,default_nr_samples,DB_DEFAULT_CHUNK_SIZE,nr_corners,max_disparity,use_smaller_matching_window);
202 reg.AddFrame(ref.GetRowPointers(),H,false,false);
203 cout << reg.profile_string << std::endl;
210 cout <<"\nelapsedTime for Reg<< "<<elapsedTime<<" ms >>>>>>>>>>>>>\n";
215 reg.UpdateReference(ref.GetRowPointers());
219 //std::vector<int> &inlier_indices = reg.GetInliers();
220 int *inlier_indices = reg.GetInliers();
221 int num_inlier_indices = reg.GetNrInliers()
[all...] |
| /external/chromium_org/third_party/mesa/src/src/gallium/drivers/r300/ |
| r300_vs.c | 110 int i, reg = 0; local
120 c->code->outputs[outputs->pos] = reg++;
127 c->code->outputs[outputs->psize] = reg++;
133 * pretend it does by skipping output index reg so the colors
140 c->code->outputs[outputs->color[i]] = reg++;
143 reg++;
150 c->code->outputs[outputs->bcolor[i]] = reg++;
152 reg++;
159 c->code->outputs[outputs->generic[i]] = reg++;
165 c->code->outputs[outputs->fog] = reg++
[all...] |
| /external/chromium_org/third_party/mesa/src/src/mesa/drivers/dri/i965/ |
| brw_vec4_copy_propagation.cpp | 175 value.reg != values[i]->reg ||
267 int reg = (virtual_grf_reg_map[inst->src[i].reg] + local
275 values[c] = cur_value[reg][BRW_GET_SWZ(inst->src[i].swizzle, c)];
302 const int reg = local
303 virtual_grf_reg_map[inst->dst.reg] + inst->dst.reg_offset;
312 cur_value[reg][i] = direct_copy ? &inst->src[0] : NULL;
327 cur_value[i][j]->reg == inst->dst.reg &
[all...] |
| /external/chromium_org/third_party/mesa/src/src/mesa/x86/rtasm/ |
| x86sse.c | 90 struct x86_reg reg,
95 assert(reg.mod == mod_REG);
98 val |= reg.idx << 3; /* reg field */
175 struct x86_reg reg; local
177 reg.file = file;
178 reg.idx = idx;
179 reg.mod = mod_REG;
180 reg.disp = 0;
182 return reg;
[all...] |
| /external/lldb/source/Plugins/Process/gdb-remote/ |
| GDBRemoteRegisterContext.h | 220 GetRegisterInfoAtIndex (size_t reg);
256 PrivateSetRegisterValue (uint32_t reg, StringExtractor &response);
262 GetRegisterIsValid (uint32_t reg) const
265 assert (reg < m_reg_valid.size());
267 if (reg < m_reg_valid.size())
268 return m_reg_valid[reg];
280 SetRegisterIsValid (uint32_t reg, bool valid)
283 assert (reg < m_reg_valid.size());
285 if (reg < m_reg_valid.size())
286 m_reg_valid[reg] = valid
[all...] |
| /external/mesa3d/src/gallium/drivers/r300/ |
| r300_vs.c | 110 int i, reg = 0; local
120 c->code->outputs[outputs->pos] = reg++;
127 c->code->outputs[outputs->psize] = reg++;
133 * pretend it does by skipping output index reg so the colors
140 c->code->outputs[outputs->color[i]] = reg++;
143 reg++;
150 c->code->outputs[outputs->bcolor[i]] = reg++;
152 reg++;
159 c->code->outputs[outputs->generic[i]] = reg++;
165 c->code->outputs[outputs->fog] = reg++
[all...] |
| /external/mesa3d/src/mesa/drivers/dri/i965/ |
| brw_vec4_copy_propagation.cpp | 175 value.reg != values[i]->reg ||
267 int reg = (virtual_grf_reg_map[inst->src[i].reg] + local
275 values[c] = cur_value[reg][BRW_GET_SWZ(inst->src[i].swizzle, c)];
302 const int reg = local
303 virtual_grf_reg_map[inst->dst.reg] + inst->dst.reg_offset;
312 cur_value[reg][i] = direct_copy ? &inst->src[0] : NULL;
327 cur_value[i][j]->reg == inst->dst.reg &
[all...] |
| /external/mesa3d/src/mesa/x86/rtasm/ |
| x86sse.c | 90 struct x86_reg reg,
95 assert(reg.mod == mod_REG);
98 val |= reg.idx << 3; /* reg field */
175 struct x86_reg reg; local
177 reg.file = file;
178 reg.idx = idx;
179 reg.mod = mod_REG;
180 reg.disp = 0;
182 return reg;
[all...] |
