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Searched
refs:TargetRegisterClass
(Results
26 - 50
of
213
) sorted by null
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/external/llvm/lib/Target/ARM/
Thumb1InstrInfo.h
48
const
TargetRegisterClass
*RC,
54
const
TargetRegisterClass
*RC,
ARMBaseRegisterInfo.h
120
const
TargetRegisterClass
*
123
const
TargetRegisterClass
*
124
getCrossCopyRegClass(const
TargetRegisterClass
*RC) const override;
126
const
TargetRegisterClass
*
127
getLargestLegalSuperClass(const
TargetRegisterClass
*RC) const override;
129
unsigned getRegPressureLimit(const
TargetRegisterClass
*RC,
141
bool avoidWriteAfterWrite(const
TargetRegisterClass
*RC) const override;
Thumb2InstrInfo.h
50
const
TargetRegisterClass
*RC,
56
const
TargetRegisterClass
*RC,
/external/llvm/lib/Target/NVPTX/
NVPTXRegisterInfo.h
67
std::string getNVPTXRegClassName(const
TargetRegisterClass
*RC);
68
std::string getNVPTXRegClassStr(const
TargetRegisterClass
*RC);
/external/llvm/include/llvm/CodeGen/
LiveStackAnalysis.h
40
std::map<int, const
TargetRegisterClass
*> S2RCMap;
57
LiveInterval &getOrCreateInterval(int Slot, const
TargetRegisterClass
*RC);
77
const
TargetRegisterClass
*getIntervalRegClass(int Slot) const {
79
std::map<int, const
TargetRegisterClass
*>::const_iterator
RegisterScavenging.h
29
class
TargetRegisterClass
;
121
BitVector getRegsAvailable(const
TargetRegisterClass
*RC);
125
unsigned FindUnusedReg(const
TargetRegisterClass
*RegClass) const;
154
unsigned scavengeRegister(const
TargetRegisterClass
*RegClass,
156
unsigned scavengeRegister(const
TargetRegisterClass
*RegClass, int SPAdj) {
/external/llvm/lib/Target/MSP430/
MSP430RegisterInfo.h
33
const
TargetRegisterClass
*
MSP430InstrInfo.h
64
const
TargetRegisterClass
*RC,
69
const
TargetRegisterClass
*RC,
/external/llvm/lib/Target/PowerPC/
PPCRegisterInfo.h
37
const
TargetRegisterClass
*
40
unsigned getRegPressureLimit(const
TargetRegisterClass
*RC,
43
const
TargetRegisterClass
*
44
getLargestLegalSuperClass(const
TargetRegisterClass
*RC) const override;
/external/llvm/lib/CodeGen/
LiveStackAnalysis.cpp
59
LiveStacks::getOrCreateInterval(int Slot, const
TargetRegisterClass
*RC) {
68
const
TargetRegisterClass
*OldRC = S2RCMap[Slot];
81
const
TargetRegisterClass
*RC = getIntervalRegClass(Slot);
CriticalAntiDepBreaker.h
51
std::vector<const
TargetRegisterClass
*> Classes;
106
const
TargetRegisterClass
*RC,
CriticalAntiDepBreaker.cpp
68
Classes[Reg] = reinterpret_cast<
TargetRegisterClass
*>(-1);
83
Classes[Reg] = reinterpret_cast<
TargetRegisterClass
*>(-1);
113
Classes[Reg] = reinterpret_cast<
TargetRegisterClass
*>(-1);
120
Classes[Reg] = reinterpret_cast<
TargetRegisterClass
*>(-1);
182
const
TargetRegisterClass
*NewRC = nullptr;
192
Classes[Reg] = reinterpret_cast<
TargetRegisterClass
*>(-1);
201
Classes[AliasReg] = reinterpret_cast<
TargetRegisterClass
*>(-1);
202
Classes[Reg] = reinterpret_cast<
TargetRegisterClass
*>(-1);
207
if (Classes[Reg] != reinterpret_cast<
TargetRegisterClass
*>(-1))
221
Classes[Reg] == reinterpret_cast<
TargetRegisterClass
*>(-1))
[
all
...]
/external/llvm/lib/Target/Mips/
MipsRegisterInfo.h
45
const
TargetRegisterClass
*getPointerRegClass(const MachineFunction &MF,
48
unsigned getRegPressureLimit(const
TargetRegisterClass
*RC,
73
virtual const
TargetRegisterClass
*intRegClass(unsigned Size) const = 0;
MipsInstrInfo.h
93
const
TargetRegisterClass
*RC,
101
const
TargetRegisterClass
*RC,
109
const
TargetRegisterClass
*RC,
116
const
TargetRegisterClass
*RC,
MipsSEISelLowering.h
27
void addMSAIntType(MVT::SimpleValueType Ty, const
TargetRegisterClass
*RC);
31
const
TargetRegisterClass
*RC);
49
const
TargetRegisterClass
*getRepRegClassFor(MVT VT) const override;
/external/llvm/lib/Target/XCore/
XCoreMachineFunctionInfo.cpp
38
const
TargetRegisterClass
*RC = &XCore::GRRegsRegClass;
54
const
TargetRegisterClass
*RC = &XCore::GRRegsRegClass;
65
const
TargetRegisterClass
*RC = &XCore::GRRegsRegClass;
XCoreInstrInfo.h
73
const
TargetRegisterClass
*RC,
79
const
TargetRegisterClass
*RC,
/external/llvm/lib/Target/R600/
SIFixSGPRCopies.cpp
87
const
TargetRegisterClass
*inferRegClassFromUses(const SIRegisterInfo *TRI,
91
const
TargetRegisterClass
*inferRegClassFromDef(const SIRegisterInfo *TRI,
133
const
TargetRegisterClass
*SIFixSGPRCopies::inferRegClassFromUses(
143
const
TargetRegisterClass
*RC = MRI.getRegClass(Reg);
159
const
TargetRegisterClass
*SIFixSGPRCopies::inferRegClassFromDef(
165
const
TargetRegisterClass
*RC = TRI->getPhysRegClass(Reg);
184
const
TargetRegisterClass
*DstRC = MRI.getRegClass(DstReg);
185
const
TargetRegisterClass
*SrcRC;
224
const
TargetRegisterClass
*RC = inferRegClassFromDef(TRI, MRI, Reg,
229
const
TargetRegisterClass
*RC = inferRegClassFromUses(TRI, MRI, Reg
[
all
...]
R600RegisterInfo.cpp
47
for (
TargetRegisterClass
::iterator I = AMDGPU::R600_AddrRegClass.begin(),
65
const
TargetRegisterClass
* R600RegisterInfo::getCFGStructurizerRegClass(
74
const
TargetRegisterClass
*RC) const {
AMDGPURegisterInfo.h
41
virtual const
TargetRegisterClass
* getCFGStructurizerRegClass(MVT VT) const {
/external/chromium_org/third_party/mesa/src/src/gallium/drivers/radeon/
R600RegisterInfo.cpp
45
for (
TargetRegisterClass
::iterator I = AMDGPU::R600_CReg32RegClass.begin(),
58
const
TargetRegisterClass
*
59
R600RegisterInfo::getISARegClass(const
TargetRegisterClass
* rc) const
107
const
TargetRegisterClass
* R600RegisterInfo::getCFGStructurizerRegClass(
AMDGPUInstrInfo.cpp
126
const
TargetRegisterClass
*RC,
135
const
TargetRegisterClass
*RC,
233
AMDGPUInstrInfo::isSafeToMoveRegClassDefs(const
TargetRegisterClass
*RC) const {
249
const
TargetRegisterClass
* oldRegClass = MRI.getRegClass(MO.getReg());
250
const
TargetRegisterClass
* newRegClass = RI.getISARegClass(oldRegClass);
/external/mesa3d/src/gallium/drivers/radeon/
R600RegisterInfo.cpp
45
for (
TargetRegisterClass
::iterator I = AMDGPU::R600_CReg32RegClass.begin(),
58
const
TargetRegisterClass
*
59
R600RegisterInfo::getISARegClass(const
TargetRegisterClass
* rc) const
107
const
TargetRegisterClass
* R600RegisterInfo::getCFGStructurizerRegClass(
AMDGPUInstrInfo.cpp
126
const
TargetRegisterClass
*RC,
135
const
TargetRegisterClass
*RC,
233
AMDGPUInstrInfo::isSafeToMoveRegClassDefs(const
TargetRegisterClass
*RC) const {
249
const
TargetRegisterClass
* oldRegClass = MRI.getRegClass(MO.getReg());
250
const
TargetRegisterClass
* newRegClass = RI.getISARegClass(oldRegClass);
/external/llvm/lib/Target/Sparc/
SparcInstrInfo.h
86
const
TargetRegisterClass
*RC,
92
const
TargetRegisterClass
*RC,
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