| /external/chromium_org/third_party/yasm/source/patched-yasm/modules/arch/x86/tests/ |
| simd64-2.asm | 3 cvtsi2sd xmm0,eax label
4 cvtsi2sd xmm0,rax label
|
| simd-2.asm | 65 cvtsi2sd xmm5, eax ; F2 0F 2A E8
label
66 cvtsi2sd xmm6, [0] ; F2 0F 2A 35 00 00 00 00
label
67 cvtsi2sd xmm7, dword [0] ; F2 0F 2A 3D 00 00 00 00
label
|
| ssewidth.asm | 94 cvtsi2sd xmm1, ebx label
95 cvtsi2sd xmm1, dword [rbx] label
96 cvtsi2sd xmm1, rbx label
97 cvtsi2sd xmm1, qword [rbx] label
|
| avx.asm | 375 cvtsi2sd xmm1, eax label
376 cvtsi2sd xmm1, dword [rax] label
381 cvtsi2sd xmm1, rax label
382 cvtsi2sd xmm1, qword [rax] label
[all...] |
| /external/llvm/test/Instrumentation/MemorySanitizer/ |
| vector_cvt.ll | 7 declare <2 x double> @llvm.x86.sse2.cvtsi2sd(<2 x double>, i32) nounwind readnone
32 %0 = tail call <2 x double> @llvm.x86.sse2.cvtsi2sd(<2 x double> %vec, i32 %a)
45 ; CHECK: call <2 x double> @llvm.x86.sse2.cvtsi2sd
|
| /external/compiler-rt/lib/builtins/i386/ |
| floatdidf.S | 22 cvtsi2sd 8(%esp), %xmm1
|
| /external/llvm/test/CodeGen/X86/ |
| negative-stride-fptosi-user.ll | 1 ; RUN: llc < %s -march=x86-64 | grep cvtsi2sd
|
| vec_ss_load_fold.ll | 77 %0 = tail call <2 x double> @llvm.x86.sse2.cvtsi2sd(<2 x double> <double
83 ; CHECK: cvtsi2sd
86 declare <2 x double> @llvm.x86.sse2.cvtsi2sd(<2 x double>, i32) nounwind readnone
|
| sse2-intrinsics-x86.ll | 154 ; CHECK: cvtsi2sd
155 %res = call <2 x double> @llvm.x86.sse2.cvtsi2sd(<2 x double> %a0, i32 7) ; <<2 x double>> [#uses=1]
158 declare <2 x double> @llvm.x86.sse2.cvtsi2sd(<2 x double>, i32) nounwind readnone
|
| /external/valgrind/main/memcheck/tests/amd64/ |
| sse_memory.c | 285 //TEST_INSN( &AllMask, 0,cvtsi2sd)
517 //TEST_INSN( &AllMask, 0,cvtsi2sd)
|
| /external/chromium_org/v8/src/ia32/ |
| macro-assembler-ia32.h | 342 // cvtsi2sd instruction only writes to the low 64-bit of dst register, which
344 // xorps to clear the dst register before cvtsi2sd to solve this issue.
345 void Cvtsi2sd(XMMRegister dst, Register src) { Cvtsi2sd(dst, Operand(src)); }
346 void Cvtsi2sd(XMMRegister dst, const Operand& src);
[all...] |
| assembler-ia32.h | 926 void cvtsi2sd(XMMRegister dst, Register src) { cvtsi2sd(dst, Operand(src)); }
927 void cvtsi2sd(XMMRegister dst, const Operand& src);
[all...] |
| macro-assembler-ia32.cc | 260 Cvtsi2sd(scratch, Operand(result_reg));
364 Cvtsi2sd(temp, Operand(result_reg));
388 Cvtsi2sd(dst, src);
619 void MacroAssembler::Cvtsi2sd(XMMRegister dst, const Operand& src) {
621 cvtsi2sd(dst, src);
753 Cvtsi2sd(scratch2, scratch1);
[all...] |
| stub-cache-ia32.cc | 530 __ Cvtsi2sd(xmm0, value_reg);
700 __ Cvtsi2sd(xmm0, value_reg);
[all...] |
| code-stubs-ia32.cc | 697 __ Cvtsi2sd(xmm0, edx);
702 __ Cvtsi2sd(xmm1, eax);
748 __ Cvtsi2sd(double_result, scratch);
768 __ Cvtsi2sd(double_base, base);
[all...] |
| codegen-ia32.cc | 630 __ Cvtsi2sd(xmm0, ebx);
[all...] |
| lithium-codegen-ia32.cc | [all...] |
| /external/qemu/target-i386/ |
| ops_sse_header.h | 160 DEF_HELPER_3(cvtsi2sd, void, env, XMMReg, i32)
|
| /art/compiler/utils/x86/ |
| assembler_x86.h | 291 void cvtsi2sd(XmmRegister dst, Register src);
|
| /external/chromium_org/v8/test/cctest/ |
| test-assembler-ia32.cc | 285 __ cvtsi2sd(xmm0, eax);
|
| test-disasm-ia32.cc | 391 __ cvtsi2sd(xmm1, Operand(ebx, ecx, times_4, 10000));
|
| /art/compiler/utils/x86_64/ |
| assembler_x86_64.h | 331 void cvtsi2sd(XmmRegister dst, CpuRegister src);
|
| /external/chromium_org/v8/src/x64/ |
| macro-assembler-x64.h | [all...] |
| /external/valgrind/main/none/tests/amd64/ |
| insn_sse2.def | 67 cvtsi2sd r32.sd[12] xmm.pd[1.11,2.22] => 1.pd[12.0,2.22]
68 cvtsi2sd m32.sd[12] xmm.pd[1.11,2.22] => 1.pd[12.0,2.22]
[all...] |
| /external/valgrind/main/none/tests/x86/ |
| insn_sse2.def | 67 cvtsi2sd r32.sd[12] xmm.pd[1.11,2.22] => 1.pd[12.0,2.22]
68 cvtsi2sd m32.sd[12] xmm.pd[1.11,2.22] => 1.pd[12.0,2.22]
[all...] |
