| /external/llvm/test/CodeGen/X86/ |
| fast-isel-select.ll | 8 ; CHECK: subb {{%[a-z0-9]+}}, [[RES:%[a-z0-9]+]]
|
| atomic8.ll | 46 ; X64: subb $3
48 ; X32: subb $3
56 ; X64: subb
58 ; X32: subb
|
| remat-invalid-liveness.ll | 8 ; CH = subb CH, ...
15 ; Currently, we check that after ECX = movl 3, we do not have subb CH,
30 ; CHECK-NOT: subb %{{[a-z]+}}, %ch
|
| atomic_add.ll | 148 ; CHECK: subb $2
156 ; CHECK: subb
|
| /external/llvm/test/CodeGen/SystemZ/ |
| shift-08.ll | 128 %subb = sub i64 64, %suba
130 %partb = lshr i64 %a, %subb
142 %subb = sub i64 64, %suba
144 %partb = lshr i64 %a, %subb
157 %subb = sub i64 64, %suba
159 %partb = lshr i64 %a, %subb
|
| shift-04.ll | 127 %subb = sub i32 32, %suba
129 %partb = lshr i32 %a, %subb
141 %subb = sub i32 32, %suba
143 %partb = lshr i32 %a, %subb
156 %subb = sub i32 32, %suba
158 %partb = lshr i32 %a, %subb
|
| /external/llvm/lib/CodeGen/ |
| TargetRegisterInfo.cpp | 202 const TargetRegisterClass *RCB, unsigned SubB,
204 assert(RCA && SubA && RCB && SubB && "Invalid arguments");
223 std::swap(SubA, SubB);
240 // The indexes must compose identically: PreA+SubA == PreB+SubB.
241 unsigned FinalB = composeSubRegIndices(IB.getSubReg(), SubB);
|
| /external/zlib/src/contrib/inflate86/ |
| inffas86.c | 194 " subb %%ah, %%bl\n" /* bits -= this.bits */
210 " subb %%ah, %%bl\n" /* bits -= this.bits */
232 " subb %%cl, %%bl\n"
260 " subb %%ah, %%bl\n" /* bits -= this.bits */
270 " subb %%cl, %%bl\n"
510 " subb %%ah, %%bl\n" /* bits -= this.bits */
544 " subb %%cl, %%bl\n"
574 " subb %%ah, %%bl\n" /* bits -= this.bits */
595 " subb %%cl, %%bl\n"
[all...] |
| inffast.S | 468 subb %ah, bits_r /* bits -= this.bits */
524 subb %cl, bits_r
568 subb %ah, bits_r /* bits -= this.bits */
604 subb %cl, bits_r
[all...] |
| /external/valgrind/main/docs/internals/ |
| 3_3_BUGSTATUS.txt | 254 r1816 (x86 CondNS after SUBB)
255 r1817 (amd64 CondNS after SUBB)
|
| /external/valgrind/main/none/tests/x86/ |
| x86locked.c | 281 GEN_do_locked_G_E(subb,al)
380 GEN_do_locked_imm_E(subb,al,0x7F)
381 GEN_do_locked_imm_E(subb,al,0xF1)
|
| insn_basic.def | [all...] |
| /external/llvm/include/llvm/Target/ |
| TargetRegisterInfo.h | 386 /// MaskB = getSubRegIndexLaneMask(SubB);
389 /// SubB.
521 /// 1. PreA + SubA == PreB + SubB (using composeSubRegIndices()), and
531 /// SubA and SubB must not be 0. Use getMatchingSuperRegClass() instead.
541 const TargetRegisterClass *RCB, unsigned SubB,
[all...] |
| /external/valgrind/main/none/tests/amd64/ |
| amd64locked.c | 301 GEN_do_locked_G_E(subb,al)
412 GEN_do_locked_imm_E(subb,al,0x7F)
413 GEN_do_locked_imm_E(subb,al,0xF1)
|
| /external/chromium_org/third_party/openssl/openssl/crypto/bn/asm/ |
| parisc-mont.pl | 511 subb $ti0,$hi0,$hi1
516 subb $ti0,%r0,$hi1
853 subb $ti0,$hi0,$hi1
858 subb $ti0,%r0,$hi1
|
| /external/llvm/test/MC/X86/ |
| x86-64.s | 30 // CHECK: subb %al, %al
31 subb %al, %al
77 // CHECK: subb %al, %bl
78 subb %al, %bl
|
| x86-32-coverage.s | 57 // CHECK: subb $254, 3735928559(%ebx,%ecx,8)
58 subb $0xfe,0xdeadbeef(%ebx,%ecx,8)
60 // CHECK: subb $127, 3735928559(%ebx,%ecx,8)
61 subb $0x7f,0xdeadbeef(%ebx,%ecx,8)
[all...] |
| /external/openssl/crypto/bn/asm/ |
| parisc-mont.pl | 511 subb $ti0,$hi0,$hi1
516 subb $ti0,%r0,$hi1
853 subb $ti0,$hi0,$hi1
858 subb $ti0,%r0,$hi1
|
| /external/zlib/src/contrib/amd64/ |
| amd64-match.S | 384 LenLower: subb $1, %al
|
| /external/zlib/src/contrib/asm686/ |
| match.S | 282 LenLower: subb $1, %al
|
| /external/chromium_org/third_party/openssl/openssl/crypto/rc4/asm/ |
| rc4-md5-x86_64.S | 1240 subb %al,%cl
1245 subb $1,%bpl
|
| rc4-x86_64.S | 509 subb $1,%r10b
|
| /external/chromium_org/v8/src/x64/ |
| regexp-macro-assembler-x64.cc | 277 __ subb(rax, Immediate('a'));
281 __ subb(rax, Immediate(224 - 'a'));
[all...] |
| /external/openssl/crypto/rc4/asm/ |
| rc4-md5-x86_64.S | 1240 subb %al,%cl
1245 subb $1,%bpl
|
| rc4-x86_64.S | 509 subb $1,%r10b
|
