| /external/llvm/test/CodeGen/AArch64/ |
| complex-fp-to-int.ll | 5 ; CHECK: fcvtl [[VAL64:v[0-9]+]].2d, v0.2s
6 ; CHECK: fcvtzs.2d v0, [[VAL64]]
14 ; CHECK: fcvtl [[VAL64:v[0-9]+]].2d, v0.2s
15 ; CHECK: fcvtzu.2d v0, [[VAL64]]
55 ; CHECK: fcvtzs.4s [[VAL64:v[0-9]+]], v0
56 ; CHECK: xtn.4h v0, [[VAL64]]
64 ; CHECK: fcvtzu.4s [[VAL64:v[0-9]+]], v0
65 ; CHECK: xtn.4h v0, [[VAL64]]
73 ; CHECK: fcvtzs.4s [[VAL64:v[0-9]+]], v0
74 ; CHECK: xtn.4h v0, [[VAL64]]
[all...] |
| complex-int-to-fp.ll | 15 ; CHECK: sshll.2d [[VAL64:v[0-9]+]], v0, #0
16 ; CHECK-NEXT: scvtf.2d v0, [[VAL64]]
24 ; CHECK: ushll.2d [[VAL64:v[0-9]+]], v0, #0
25 ; CHECK-NEXT: ucvtf.2d v0, [[VAL64]]
35 ; CHECK: sshll.2d [[VAL64:v[0-9]+]], [[VAL32]], #0
36 ; CHECK: scvtf.2d v0, [[VAL64]]
45 ; CHECK: ushll.2d [[VAL64:v[0-9]+]], [[VAL32]], #0
46 ; CHECK: ucvtf.2d v0, [[VAL64]]
56 ; CHECK: sshll.2d [[VAL64:v[0-9]+]], [[VAL32]], #0
57 ; CHECK: scvtf.2d v0, [[VAL64]]
[all...] |
| tst-br.ll | 13 %val64 = load i64* @var64
27 %tbit2 = and i64 %val64, 32768
33 %tbit3 = and i64 %val64, 4096
|
| addsub.ll | 20 %val64 = load i64* @var_i64
21 %newval64 = add i64 %val64, 52
37 %val64 = load i64* @var_i64
38 %newval64 = add i64 %val64, 16773120 ; =0xfff000
54 %val64 = load i64* @var_i64
55 %newval64 = sub i64 %val64, 52
71 %val64 = load i64* @var_i64
72 %newval64 = sub i64 %val64, 16773120 ; =0xfff000
|
| arm64-fp128.ll | 69 %val64 = fptosi fp128 %val to i64
70 store i64 %val64, i64* @var64
84 %val64 = fptoui fp128 %val to i64
85 store i64 %val64, i64* @var64
100 %val64 = sitofp i64 %src64 to fp128
101 store volatile fp128 %val64, fp128* @lhs
116 %val64 = uitofp i64 %src64 to fp128
117 store volatile fp128 %val64, fp128* @lhs
|
| bitfield.ll | 67 define void @test_shifts(i32 %val32, i64 %val64) {
82 %shift4 = ashr i64 %val64, 31
86 %shift5 = lshr i64 %val64, 8
90 %shift6 = shl i64 %val64, 63
94 %shift7 = ashr i64 %val64, 63
98 %shift8 = lshr i64 %val64, 63
|
| floatdp_1source.ll | 111 %val64 = load volatile double* @vardouble
129 %val64to16 = fptrunc double %val64 to half
133 %val64to32 = fptrunc double %val64 to float
|
| func-argpassing.ll | 135 %val64 = load volatile i64* %addr
136 store volatile i64 %val64, i64* @var64
138 ; CHECK: ldr [[VAL64:x[0-9]+]], [sp]
139 ; CHECK: str [[VAL64]], [{{x[0-9]+}}, {{#?}}:lo12:var64]
|
| ldst-unscaledimm.ll | 67 %val64 = load volatile i64* @var_64bit
68 %val8_trunc64 = trunc i64 %val64 to i8
135 %val64 = load volatile i64* @var_64bit
136 %val16_trunc64 = trunc i64 %val64 to i16
|
| ldst-regoffset.ll | 188 %val64 = load volatile i64* @var_64bit
189 store volatile i64 %val64, i64* %addr_uxtwN
240 %val64 = load volatile float* @var_float
241 store volatile float %val64, float* %addr_uxtwN
293 %val64 = load volatile double* @var_double
294 store volatile double %val64, double* %addr_uxtwN
347 %val64 = load volatile fp128* %base
348 store volatile fp128 %val64, fp128* %addr_uxtwN
|
| ldst-unsignedimm.ll | 58 %val64 = load volatile i64* @var_64bit
59 %val8_trunc64 = trunc i64 %val64 to i8
112 %val64 = load volatile i64* @var_64bit
113 %val16_trunc64 = trunc i64 %val64 to i16
|
| arm64-register-offset-addressing.ll | 136 %val64 = load volatile i64* @var_64bit
137 store volatile i64 %val64, i64* %addr_uxtwN
|
| /external/linux-tools-perf/perf-3.12.0/tools/perf/util/ |
| types.h | 20 u64 val64; member in union:u64_swap
|
| evsel.c | 1179 u.val64 = *array;
1182 u.val64 = bswap_64(u.val64);
1206 u.val64 = *array;
1209 u.val64 = bswap_64(u.val64);
1286 u.val64 = *array;
1289 u.val64 = bswap_64(u.val64);
1322 u.val64 = *array
[all...] |
| /external/llvm/test/MC/AArch64/ |
| elf-globaladdress.ll | 24 %val64 = load i64* @var64
25 store volatile i64 %val64, i64* @var64
|
| /cts/tests/tests/media/libmediandkjni/ |
| native-media-jni.cpp | 99 int64_t val64; local
104 AMediaFormat_getInt64(format, AMEDIAFORMAT_KEY_DURATION, &val64);
105 sizes.add(val64);
109 int64_t val64; local
114 AMediaFormat_getInt64(format, AMEDIAFORMAT_KEY_DURATION, &val64);
115 sizes.add(val64);
|
| /external/libunwind/src/dwarf/ |
| Gexpr.c | 46 #define VAL64 0x3
61 [DW_OP_const8u] = OPND1 (VAL64),
62 [DW_OP_const8s] = OPND1 (VAL64),
139 case 8: operand_type = VAL64; break;
166 case VAL64:
|
| /external/chromium_org/third_party/icu/source/test/cintltst/ |
| cnumtst.c | 1203 int64_t val64; local
[all...] |
| /external/qemu-pc-bios/bochs/ |
| config.h.in | 480 #define GET32L(val64) ((Bit32u)(((Bit64u)(val64)) & 0xFFFFFFFF))
481 #define GET32H(val64) ((Bit32u)(((Bit64u)(val64)) >> 32))
|
| /external/icu/icu4c/source/test/cintltst/ |
| cnumtst.c | 1377 int64_t val64; local
[all...] |
| /external/qemu/tcg/ |
| tcg.c | 882 TCGv_i64 val64 = tcg_temp_new_i64(); local
885 tcg_add_param_i64(val64);
889 tcg_gen_trunc_i64_i32(val, val64);
890 tcg_temp_free_i64(val64);
917 TCGv_i64 val64 = tcg_temp_new_i64(); local
919 tcg_gen_extu_i32_i64(val64, val);
922 tcg_add_param_i64(val64);
926 tcg_temp_free_i64(val64);
[all...] |
| /bionic/libc/kernel/uapi/linux/genwqe/ |
| genwqe_card.h | 181 __u64 val64; member in struct:genwqe_reg_io
|
| /external/kernel-headers/original/uapi/linux/genwqe/ |
| genwqe_card.h | 251 __u64 val64; member in struct:genwqe_reg_io
|
| /prebuilts/ndk/9/platforms/android-19/arch-arm64/usr/include/linux/genwqe/ |
| genwqe_card.h | 181 __u64 val64; member in struct:genwqe_reg_io
|
| /prebuilts/ndk/9/platforms/android-19/arch-mips64/usr/include/linux/genwqe/ |
| genwqe_card.h | 181 __u64 val64; member in struct:genwqe_reg_io
|
