Lines Matching refs:rd
28 void Thumb2Assembler::and_(Register rd, Register rn, const ShifterOperand& so,
30 EmitDataProcessing(cond, AND, 0, rn, rd, so);
34 void Thumb2Assembler::eor(Register rd, Register rn, const ShifterOperand& so,
36 EmitDataProcessing(cond, EOR, 0, rn, rd, so);
40 void Thumb2Assembler::sub(Register rd, Register rn, const ShifterOperand& so,
42 EmitDataProcessing(cond, SUB, 0, rn, rd, so);
46 void Thumb2Assembler::rsb(Register rd, Register rn, const ShifterOperand& so,
48 EmitDataProcessing(cond, RSB, 0, rn, rd, so);
52 void Thumb2Assembler::rsbs(Register rd, Register rn, const ShifterOperand& so,
54 EmitDataProcessing(cond, RSB, 1, rn, rd, so);
58 void Thumb2Assembler::add(Register rd, Register rn, const ShifterOperand& so,
60 EmitDataProcessing(cond, ADD, 0, rn, rd, so);
64 void Thumb2Assembler::adds(Register rd, Register rn, const ShifterOperand& so,
66 EmitDataProcessing(cond, ADD, 1, rn, rd, so);
70 void Thumb2Assembler::subs(Register rd, Register rn, const ShifterOperand& so,
72 EmitDataProcessing(cond, SUB, 1, rn, rd, so);
76 void Thumb2Assembler::adc(Register rd, Register rn, const ShifterOperand& so,
78 EmitDataProcessing(cond, ADC, 0, rn, rd, so);
82 void Thumb2Assembler::sbc(Register rd, Register rn, const ShifterOperand& so,
84 EmitDataProcessing(cond, SBC, 0, rn, rd, so);
88 void Thumb2Assembler::rsc(Register rd, Register rn, const ShifterOperand& so,
90 EmitDataProcessing(cond, RSC, 0, rn, rd, so);
116 void Thumb2Assembler::orr(Register rd, Register rn,
118 EmitDataProcessing(cond, ORR, 0, rn, rd, so);
122 void Thumb2Assembler::orrs(Register rd, Register rn,
124 EmitDataProcessing(cond, ORR, 1, rn, rd, so);
128 void Thumb2Assembler::mov(Register rd, const ShifterOperand& so, Condition cond) {
129 EmitDataProcessing(cond, MOV, 0, R0, rd, so);
133 void Thumb2Assembler::movs(Register rd, const ShifterOperand& so, Condition cond) {
134 EmitDataProcessing(cond, MOV, 1, R0, rd, so);
138 void Thumb2Assembler::bic(Register rd, Register rn, const ShifterOperand& so,
140 EmitDataProcessing(cond, BIC, 0, rn, rd, so);
144 void Thumb2Assembler::mvn(Register rd, const ShifterOperand& so, Condition cond) {
145 EmitDataProcessing(cond, MVN, 0, R0, rd, so);
149 void Thumb2Assembler::mvns(Register rd, const ShifterOperand& so, Condition cond) {
150 EmitDataProcessing(cond, MVN, 1, R0, rd, so);
154 void Thumb2Assembler::mul(Register rd, Register rn, Register rm, Condition cond) {
155 if (rd == rm && !IsHighRegister(rd) && !IsHighRegister(rn) && !force_32bit_) {
158 rn << 3 | rd;
168 static_cast<uint32_t>(rd) << 8 |
177 void Thumb2Assembler::mla(Register rd, Register rn, Register rm, Register ra,
184 static_cast<uint32_t>(rd) << 8 |
193 void Thumb2Assembler::mls(Register rd, Register rn, Register rm, Register ra,
200 static_cast<uint32_t>(rd) << 8 |
225 void Thumb2Assembler::sdiv(Register rd, Register rn, Register rm, Condition cond) {
232 static_cast<uint32_t>(rd) << 8 |
240 void Thumb2Assembler::udiv(Register rd, Register rn, Register rm, Condition cond) {
247 static_cast<uint32_t>(rd) << 8 |
255 void Thumb2Assembler::ldr(Register rd, const Address& ad, Condition cond) {
256 EmitLoadStore(cond, true, false, false, false, rd, ad);
260 void Thumb2Assembler::str(Register rd, const Address& ad, Condition cond) {
261 EmitLoadStore(cond, false, false, false, false, rd, ad);
265 void Thumb2Assembler::ldrb(Register rd, const Address& ad, Condition cond) {
266 EmitLoadStore(cond, true, true, false, false, rd, ad);
270 void Thumb2Assembler::strb(Register rd, const Address& ad, Condition cond) {
271 EmitLoadStore(cond, false, true, false, false, rd, ad);
275 void Thumb2Assembler::ldrh(Register rd, const Address& ad, Condition cond) {
276 EmitLoadStore(cond, true, false, true, false, rd, ad);
280 void Thumb2Assembler::strh(Register rd, const Address& ad, Condition cond) {
281 EmitLoadStore(cond, false, false, true, false, rd, ad);
285 void Thumb2Assembler::ldrsb(Register rd, const Address& ad, Condition cond) {
286 EmitLoadStore(cond, true, true, false, true, rd, ad);
290 void Thumb2Assembler::ldrsh(Register rd, const Address& ad, Condition cond) {
291 EmitLoadStore(cond, true, false, true, true, rd, ad);
295 void Thumb2Assembler::ldrd(Register rd, const Address& ad, Condition cond) {
296 CHECK_EQ(rd % 2, 0);
299 static_cast<int32_t>(rd) << 12 |
300 (static_cast<int32_t>(rd) + 1) << 8 |
306 void Thumb2Assembler::strd(Register rd, const Address& ad, Condition cond) {
307 CHECK_EQ(rd % 2, 0);
310 static_cast<int32_t>(rd) << 12 |
311 (static_cast<int32_t>(rd) + 1) << 8 |
616 Register rd,
623 || ((opcode == ADD || opcode == SUB) && (rn == rd));
625 if (IsHighRegister(rd) || IsHighRegister(rn)) {
635 // If rn is SP and rd is a high register we need to use a 32 bit encoding.
636 if (rn == SP && rd != SP && IsHighRegister(rd)) {
642 if (rd == SP && rn == SP) {
646 } else if (opcode == ADD && rd != SP && rn == SP) { // 10 bit immediate.
650 } else if (opcode == SUB && rd != SP && rn == SP) {
651 // SUB rd, SP, #imm is always 32 bit.
696 if (so.IsRegister() && rd != rn) {
702 if (rn_is_valid && rn != rd) {
734 Register rd,
746 case TST: thumb_opcode = 0b0000; set_cc = true; rd = PC; break;
747 case TEQ: thumb_opcode = 0b0100; set_cc = true; rd = PC; break;
748 case CMP: thumb_opcode = 0b1101; set_cc = true; rd = PC; break;
749 case CMN: thumb_opcode = 0b1000; set_cc = true; rd = PC; break;
780 rd << 8 |
794 rd << 8 |
803 rd << 8 |
814 Register rd,
817 Emit16BitAddSub(cond, opcode, set_cc, rn, rd, so);
883 rd = rn;
890 rd = rn;
905 if (IsHighRegister(rn) || IsHighRegister(rd)) {
909 // Put the top bit of rd into the bottom bit of the opcode.
910 thumb_opcode = 0b0001100 | static_cast<uint32_t>(rd) >> 3;
911 rd = static_cast<Register>(static_cast<uint32_t>(rd) & 0b111);
930 rd << rd_shift |
943 Register rd,
963 if (rn == rd) {
968 // Make Rn also contain the top bit of rd.
970 (static_cast<uint32_t>(rd) & 0b1000) << 1);
971 rd = static_cast<Register>(static_cast<uint32_t>(rd) & 0b111);
982 if (rd == SP && rn == SP) {
990 // Remove rd and rn from instruction by orring it with immed and clearing bits.
992 rd = R0;
996 } else if (rd != SP && rn == SP) {
997 // ADD rd, SP, #imm
1009 } else if (rn != rd) {
1033 if (rd == SP && rn == SP) {
1041 // Remove rd and rn from instruction by orring it with immed and clearing bits.
1043 rd = R0;
1047 } else if (rn != rd) {
1068 rd << rd_shift |
1080 Register rd,
1082 CHECK_NE(rd, kNoRegister);
1085 if (Is32BitDataProcessing(cond, opcode, set_cc, rn, rd, so)) {
1086 Emit32BitDataProcessing(cond, opcode, set_cc, rn, rd, so);
1088 Emit16BitDataProcessing(cond, opcode, set_cc, rn, rd, so);
1092 void Thumb2Assembler::EmitShift(Register rd, Register rm, Shift shift, uint8_t amount, bool setcc) {
1094 if (IsHighRegister(rd) || IsHighRegister(rm) || shift == ROR || shift == RRX) {
1111 static_cast<int16_t>(rd) << 8 | opcode << 4;
1124 static_cast<int16_t>(rd);
1129 void Thumb2Assembler::EmitShift(Register rd, Register rn, Shift shift, Register rm, bool setcc) {
1132 if (IsHighRegister(rd) || IsHighRegister(rm) || IsHighRegister(rn) || rd != rn) {
1150 static_cast<int16_t>(rd) << 8 | opcode << 21;
1162 static_cast<int16_t>(rd);
1249 Register rd,
1251 CHECK_NE(rd, kNoRegister);
1254 if (IsHighRegister(rd)) {
1297 static_cast<uint32_t>(rd) << 12 |
1326 encoding |= rd << 8 | offset >> 2;
1330 encoding |= static_cast<uint32_t>(rd);
1365 static_cast<uint32_t>(rd) << 12;
1371 int32_t encoding = B14 | (load ? B11 : 0) | static_cast<uint32_t>(rd) << 8 | offset >> 2;
1383 int32_t encoding = 0x1f << 27 | (load ? B20 : 0) | static_cast<uint32_t>(rd) << 12 |
1393 int32_t encoding = B14 | B12 | (load ? B11 : 0) | static_cast<uint32_t>(rd) |
1511 void Thumb2Assembler::clz(Register rd, Register rm, Condition cond) {
1512 CHECK_NE(rd, kNoRegister);
1515 CHECK_NE(rd, PC);
1521 static_cast<uint32_t>(rd) << 8 |
1528 void Thumb2Assembler::movw(Register rd, uint16_t imm16, Condition cond) {
1531 if (IsHighRegister(rd)|| imm16 >= 256u) {
1543 static_cast<uint32_t>(rd) << 8 |
1550 int16_t encoding = B13 | static_cast<uint16_t>(rd) << 8 |
1557 void Thumb2Assembler::movt(Register rd, uint16_t imm16, Condition cond) {
1566 static_cast<uint32_t>(rd) << 8 |
1598 void Thumb2Assembler::strex(Register rd,
1604 CHECK_NE(rd, kNoRegister);
1612 static_cast<uint32_t>(rd) << 8 |
1618 void Thumb2Assembler::strex(Register rd,
1622 strex(rd, rt, rn, 0, cond);
2049 void Thumb2Assembler::Push(Register rd, Condition cond) {
2050 str(rd, Address(SP, -kRegisterSize, Address::PreIndex), cond);
2054 void Thumb2Assembler::Pop(Register rd, Condition cond) {
2055 ldr(rd, Address(SP, kRegisterSize, Address::PostIndex), cond);
2069 void Thumb2Assembler::Mov(Register rd, Register rm, Condition cond) {
2070 if (cond != AL || rd != rm) {
2071 mov(rd, ShifterOperand(rm), cond);
2155 void Thumb2Assembler::Lsl(Register rd, Register rm, uint32_t shift_imm,
2159 EmitShift(rd, rm, LSL, shift_imm, setcc);
2163 void Thumb2Assembler::Lsr(Register rd, Register rm, uint32_t shift_imm,
2168 EmitShift(rd, rm, LSR, shift_imm, setcc);
2172 void Thumb2Assembler::Asr(Register rd, Register rm, uint32_t shift_imm,
2177 EmitShift(rd, rm, ASR, shift_imm, setcc);
2181 void Thumb2Assembler::Ror(Register rd, Register rm, uint32_t shift_imm,
2185 EmitShift(rd, rm, ROR, shift_imm, setcc);
2189 void Thumb2Assembler::Rrx(Register rd, Register rm, bool setcc, Condition cond) {
2191 EmitShift(rd, rm, RRX, rm, setcc);
2195 void Thumb2Assembler::Lsl(Register rd, Register rm, Register rn,
2198 EmitShift(rd, rm, LSL, rn, setcc);
2202 void Thumb2Assembler::Lsr(Register rd, Register rm, Register rn,
2205 EmitShift(rd, rm, LSR, rn, setcc);
2209 void Thumb2Assembler::Asr(Register rd, Register rm, Register rn,
2212 EmitShift(rd, rm, ASR, rn, setcc);
2216 void Thumb2Assembler::Ror(Register rd, Register rm, Register rn,
2219 EmitShift(rd, rm, ROR, rn, setcc);
2290 void Thumb2Assembler::AddConstant(Register rd, int32_t value, Condition cond) {
2291 AddConstant(rd, rd, value, cond);
2295 void Thumb2Assembler::AddConstant(Register rd, Register rn, int32_t value,
2298 if (rd != rn) {
2299 mov(rd, ShifterOperand(rn), cond);
2307 if (ShifterOperand::CanHoldThumb(rd, rn, ADD, value, &shifter_op)) {
2308 add(rd, rn, shifter_op, cond);
2309 } else if (ShifterOperand::CanHoldThumb(rd, rn, SUB, -value, &shifter_op)) {
2310 sub(rd, rn, shifter_op, cond);
2313 if (ShifterOperand::CanHoldThumb(rd, rn, MVN, ~value, &shifter_op)) {
2315 add(rd, rn, ShifterOperand(IP), cond);
2316 } else if (ShifterOperand::CanHoldThumb(rd, rn, MVN, ~(-value), &shifter_op)) {
2318 sub(rd, rn, ShifterOperand(IP), cond);
2325 add(rd, rn, ShifterOperand(IP), cond);
2331 void Thumb2Assembler::AddConstantSetFlags(Register rd, Register rn, int32_t value,
2334 if (ShifterOperand::CanHoldThumb(rd, rn, ADD, value, &shifter_op)) {
2335 adds(rd, rn, shifter_op, cond);
2336 } else if (ShifterOperand::CanHoldThumb(rd, rn, ADD, -value, &shifter_op)) {
2337 subs(rd, rn, shifter_op, cond);
2340 if (ShifterOperand::CanHoldThumb(rd, rn, MVN, ~value, &shifter_op)) {
2342 adds(rd, rn, ShifterOperand(IP), cond);
2343 } else if (ShifterOperand::CanHoldThumb(rd, rn, MVN, ~(-value), &shifter_op)) {
2345 subs(rd, rn, ShifterOperand(IP), cond);
2352 adds(rd, rn, ShifterOperand(IP), cond);
2358 void Thumb2Assembler::LoadImmediate(Register rd, int32_t value, Condition cond) {
2360 if (ShifterOperand::CanHoldThumb(rd, R0, MOV, value, &shifter_op)) {
2361 mov(rd, shifter_op, cond);
2362 } else if (ShifterOperand::CanHoldThumb(rd, R0, MVN, ~value, &shifter_op)) {
2363 mvn(rd, shifter_op, cond);
2365 movw(rd, Low16Bits(value), cond);
2368 movt(rd, value_high, cond);
