Lines Matching refs:rt
41 void MipsAssembler::EmitR(int opcode, Register rs, Register rt, Register rd, int shamt, int funct) {
43 CHECK_NE(rt, kNoRegister);
47 static_cast<int32_t>(rt) << kRtShift |
54 void MipsAssembler::EmitI(int opcode, Register rs, Register rt, uint16_t imm) {
56 CHECK_NE(rt, kNoRegister);
59 static_cast<int32_t>(rt) << kRtShift |
83 void MipsAssembler::EmitFI(int opcode, int fmt, FRegister rt, uint16_t imm) {
84 CHECK_NE(rt, kNoFRegister);
87 static_cast<int32_t>(rt) << kRtShift |
92 void MipsAssembler::EmitBranch(Register rt, Register rs, Label* label, bool equal) {
102 Beq(rt, rs, (offset >> 2) & kBranchOffsetMask);
104 Bne(rt, rs, (offset >> 2) & kBranchOffsetMask);
162 void MipsAssembler::Add(Register rd, Register rs, Register rt) {
163 EmitR(0, rs, rt, rd, 0, 0x20);
166 void MipsAssembler::Addu(Register rd, Register rs, Register rt) {
167 EmitR(0, rs, rt, rd, 0, 0x21);
170 void MipsAssembler::Addi(Register rt, Register rs, uint16_t imm16) {
171 EmitI(0x8, rs, rt, imm16);
174 void MipsAssembler::Addiu(Register rt, Register rs, uint16_t imm16) {
175 EmitI(0x9, rs, rt, imm16);
178 void MipsAssembler::Sub(Register rd, Register rs, Register rt) {
179 EmitR(0, rs, rt, rd, 0, 0x22);
182 void MipsAssembler::Subu(Register rd, Register rs, Register rt) {
183 EmitR(0, rs, rt, rd, 0, 0x23);
186 void MipsAssembler::Mult(Register rs, Register rt) {
187 EmitR(0, rs, rt, static_cast<Register>(0), 0, 0x18);
190 void MipsAssembler::Multu(Register rs, Register rt) {
191 EmitR(0, rs, rt, static_cast<Register>(0), 0, 0x19);
194 void MipsAssembler::Div(Register rs, Register rt) {
195 EmitR(0, rs, rt, static_cast<Register>(0), 0, 0x1a);
198 void MipsAssembler::Divu(Register rs, Register rt) {
199 EmitR(0, rs, rt, static_cast<Register>(0), 0, 0x1b);
202 void MipsAssembler::And(Register rd, Register rs, Register rt) {
203 EmitR(0, rs, rt, rd, 0, 0x24);
206 void MipsAssembler::Andi(Register rt, Register rs, uint16_t imm16) {
207 EmitI(0xc, rs, rt, imm16);
210 void MipsAssembler::Or(Register rd, Register rs, Register rt) {
211 EmitR(0, rs, rt, rd, 0, 0x25);
214 void MipsAssembler::Ori(Register rt, Register rs, uint16_t imm16) {
215 EmitI(0xd, rs, rt, imm16);
218 void MipsAssembler::Xor(Register rd, Register rs, Register rt) {
219 EmitR(0, rs, rt, rd, 0, 0x26);
222 void MipsAssembler::Xori(Register rt, Register rs, uint16_t imm16) {
223 EmitI(0xe, rs, rt, imm16);
226 void MipsAssembler::Nor(Register rd, Register rs, Register rt) {
227 EmitR(0, rs, rt, rd, 0, 0x27);
242 void MipsAssembler::Sllv(Register rd, Register rs, Register rt) {
243 EmitR(0, rs, rt, rd, 0, 0x04);
246 void MipsAssembler::Srlv(Register rd, Register rs, Register rt) {
247 EmitR(0, rs, rt, rd, 0, 0x06);
250 void MipsAssembler::Srav(Register rd, Register rs, Register rt) {
251 EmitR(0, rs, rt, rd, 0, 0x07);
254 void MipsAssembler::Lb(Register rt, Register rs, uint16_t imm16) {
255 EmitI(0x20, rs, rt, imm16);
258 void MipsAssembler::Lh(Register rt, Register rs, uint16_t imm16) {
259 EmitI(0x21, rs, rt, imm16);
262 void MipsAssembler::Lw(Register rt, Register rs, uint16_t imm16) {
263 EmitI(0x23, rs, rt, imm16);
266 void MipsAssembler::Lbu(Register rt, Register rs, uint16_t imm16) {
267 EmitI(0x24, rs, rt, imm16);
270 void MipsAssembler::Lhu(Register rt, Register rs, uint16_t imm16) {
271 EmitI(0x25, rs, rt, imm16);
274 void MipsAssembler::Lui(Register rt, uint16_t imm16) {
275 EmitI(0xf, static_cast<Register>(0), rt, imm16);
286 void MipsAssembler::Sb(Register rt, Register rs, uint16_t imm16) {
287 EmitI(0x28, rs, rt, imm16);
290 void MipsAssembler::Sh(Register rt, Register rs, uint16_t imm16) {
291 EmitI(0x29, rs, rt, imm16);
294 void MipsAssembler::Sw(Register rt, Register rs, uint16_t imm16) {
295 EmitI(0x2b, rs, rt, imm16);
298 void MipsAssembler::Slt(Register rd, Register rs, Register rt) {
299 EmitR(0, rs, rt, rd, 0, 0x2a);
302 void MipsAssembler::Sltu(Register rd, Register rs, Register rt) {
303 EmitR(0, rs, rt, rd, 0, 0x2b);
306 void MipsAssembler::Slti(Register rt, Register rs, uint16_t imm16) {
307 EmitI(0xa, rs, rt, imm16);
310 void MipsAssembler::Sltiu(Register rt, Register rs, uint16_t imm16) {
311 EmitI(0xb, rs, rt, imm16);
314 void MipsAssembler::Beq(Register rt, Register rs, uint16_t imm16) {
315 EmitI(0x4, rs, rt, imm16);
319 void MipsAssembler::Bne(Register rt, Register rs, uint16_t imm16) {
320 EmitI(0x5, rs, rt, imm16);
389 void MipsAssembler::Mfc1(Register rt, FRegister fs) {
390 EmitFR(0x11, 0x00, static_cast<FRegister>(rt), fs, static_cast<FRegister>(0), 0x0);
422 void MipsAssembler::Move(Register rt, Register rs) {
423 EmitI(0x8, rs, rt, 0);
426 void MipsAssembler::Clear(Register rt) {
427 EmitR(0, static_cast<Register>(0), static_cast<Register>(0), rt, 0, 0x20);
430 void MipsAssembler::Not(Register rt, Register rs) {
431 EmitR(0, static_cast<Register>(0), rs, rt, 0, 0x27);
434 void MipsAssembler::Mul(Register rd, Register rs, Register rt) {
435 Mult(rs, rt);
439 void MipsAssembler::Div(Register rd, Register rs, Register rt) {
440 Div(rs, rt);
444 void MipsAssembler::Rem(Register rd, Register rs, Register rt) {
445 Div(rs, rt);
449 void MipsAssembler::AddConstant(Register rt, Register rs, int32_t value) {
450 Addi(rt, rs, value);
453 void MipsAssembler::LoadImmediate(Register rt, int32_t value) {
454 Addi(rt, ZERO, value);
