Home | History | Annotate | Download | only in arm64

Lines Matching refs:shift_amount

338 Operand::Operand(Register reg, Shift shift, unsigned shift_amount)
343 shift_amount_(shift_amount) {
344 ASSERT(reg.Is64Bits() || (shift_amount < kWRegSizeInBits));
345 ASSERT(reg.Is32Bits() || (shift_amount < kXRegSizeInBits));
350 Operand::Operand(Register reg, Extend extend, unsigned shift_amount)
355 shift_amount_(shift_amount) {
357 ASSERT(shift_amount <= 4);
426 unsigned Operand::shift_amount() const {
466 unsigned shift_amount)
468 shift_(NO_SHIFT), extend_(extend), shift_amount_(shift_amount) {
481 unsigned shift_amount)
483 shift_(shift), extend_(NO_EXTEND), shift_amount_(shift_amount) {
503 shift_amount_ = offset.shift_amount();
517 shift_amount_ = offset.shift_amount();
554 return Operand(regoffset(), shift(), shift_amount());
556 return Operand(regoffset(), extend(), shift_amount());
1162 Instr Assembler::ImmShiftLS(unsigned shift_amount) {
1163 ASSERT(is_uint1(shift_amount));
1164 return shift_amount << ImmShiftLS_offset;