Lines Matching refs:rt
647 bool result = instr->IsLdrLiteralX() && (instr->Rt() == xzr.code());
688 Emit(LDR_x_lit | ImmLLiteral(size + 1) | Rt(xzr));
705 instr->preceding()->Rt() == xzr.code());
783 void Assembler::cbz(const Register& rt,
786 Emit(SF(rt) | CBZ | ImmCmpBranch(imm19) | Rt(rt));
790 void Assembler::cbz(const Register& rt,
793 cbz(rt, LinkAndGetInstructionOffsetTo(label));
797 void Assembler::cbnz(const Register& rt,
800 Emit(SF(rt) | CBNZ | ImmCmpBranch(imm19) | Rt(rt));
804 void Assembler::cbnz(const Register& rt,
807 cbnz(rt, LinkAndGetInstructionOffsetTo(label));
811 void Assembler::tbz(const Register& rt,
815 ASSERT(rt.Is64Bits() || (rt.Is32Bits() && (bit_pos < kWRegSizeInBits)));
816 Emit(TBZ | ImmTestBranchBit(bit_pos) | ImmTestBranch(imm14) | Rt(rt));
820 void Assembler::tbz(const Register& rt,
824 tbz(rt, bit_pos, LinkAndGetInstructionOffsetTo(label));
828 void Assembler::tbnz(const Register& rt,
832 ASSERT(rt.Is64Bits() || (rt.Is32Bits() && (bit_pos < kWRegSizeInBits)));
833 Emit(TBNZ | ImmTestBranchBit(bit_pos) | ImmTestBranch(imm14) | Rt(rt));
837 void Assembler::tbnz(const Register& rt,
841 tbnz(rt, bit_pos, LinkAndGetInstructionOffsetTo(label));
1348 void Assembler::ldp(const CPURegister& rt,
1351 LoadStorePair(rt, rt2, src, LoadPairOpFor(rt, rt2));
1355 void Assembler::stp(const CPURegister& rt,
1358 LoadStorePair(rt, rt2, dst, StorePairOpFor(rt, rt2));
1362 void Assembler::ldpsw(const Register& rt,
1365 ASSERT(rt.Is64Bits());
1366 LoadStorePair(rt, rt2, src, LDPSW_x);
1370 void Assembler::LoadStorePair(const CPURegister& rt,
1374 // 'rt' and 'rt2' can only be aliased for stores.
1375 ASSERT(((op & LoadStorePairLBit) == 0) || !rt.Is(rt2));
1376 ASSERT(AreSameSizeAndType(rt, rt2));
1378 Instr memop = op | Rt(rt) | Rt2(rt2) | RnSP(addr.base()) |
1386 ASSERT(!rt.Is(addr.base()));
1400 void Assembler::ldnp(const CPURegister& rt,
1403 LoadStorePairNonTemporal(rt, rt2, src,
1404 LoadPairNonTemporalOpFor(rt, rt2));
1408 void Assembler::stnp(const CPURegister& rt,
1411 LoadStorePairNonTemporal(rt, rt2, dst,
1412 StorePairNonTemporalOpFor(rt, rt2));
1416 void Assembler::LoadStorePairNonTemporal(const CPURegister& rt,
1420 ASSERT(!rt.Is(rt2));
1421 ASSERT(AreSameSizeAndType(rt, rt2));
1426 Emit(op | Rt(rt) | Rt2(rt2) | RnSP(addr.base()) |
1432 void Assembler::ldrb(const Register& rt, const MemOperand& src) {
1433 LoadStore(rt, src, LDRB_w);
1437 void Assembler::strb(const Register& rt, const MemOperand& dst) {
1438 LoadStore(rt, dst, STRB_w);
1442 void Assembler::ldrsb(const Register& rt, const MemOperand& src) {
1443 LoadStore(rt, src, rt.Is64Bits() ? LDRSB_x : LDRSB_w);
1447 void Assembler::ldrh(const Register& rt, const MemOperand& src) {
1448 LoadStore(rt, src, LDRH_w);
1452 void Assembler::strh(const Register& rt, const MemOperand& dst) {
1453 LoadStore(rt, dst, STRH_w);
1457 void Assembler::ldrsh(const Register& rt, const MemOperand& src) {
1458 LoadStore(rt, src, rt.Is64Bits() ? LDRSH_x : LDRSH_w);
1462 void Assembler::ldr(const CPURegister& rt, const MemOperand& src) {
1463 LoadStore(rt, src, LoadOpFor(rt));
1467 void Assembler::str(const CPURegister& rt, const MemOperand& src) {
1468 LoadStore(rt, src, StoreOpFor(rt));
1472 void Assembler::ldrsw(const Register& rt, const MemOperand& src) {
1473 ASSERT(rt.Is64Bits());
1474 LoadStore(rt, src, LDRSW_x);
1478 void Assembler::ldr_pcrel(const CPURegister& rt, int imm19) {
1481 ASSERT(!rt.IsZero());
1482 Emit(LoadLiteralOpFor(rt) | ImmLLiteral(imm19) | Rt(rt));
1486 void Assembler::ldr(const CPURegister& rt, const Immediate& imm) {
1488 ASSERT(rt.Is64Bits());
1494 ldr_pcrel(rt, 0);
1515 void Assembler::mrs(const Register& rt, SystemRegister sysreg) {
1516 ASSERT(rt.Is64Bits());
1517 Emit(MRS | ImmSystemRegister(sysreg) | Rt(rt));
1521 void Assembler::msr(SystemRegister sysreg, const Register& rt) {
1522 ASSERT(rt.Is64Bits());
1523 Emit(MSR | Rt(rt) | ImmSystemRegister(sysreg));
1528 Emit(HINT | ImmHint(code) | Rt(xzr));
2206 void Assembler::LoadStore(const CPURegister& rt,
2209 Instr memop = op | Rt(rt) | RnSP(addr.base());
2243 ASSERT(!rt.Is(addr.base()));
