Lines Matching refs:overflow
598 (result, carry, overflow) = AddWithCarry(SP, imm32, '0');
607 APSR.V = overflow;
1285 (result, carry, overflow) = AddWithCarry(SP, imm32, '0');
1294 APSR.V = overflow;
1352 // APSR.V = overflow;
1370 (result, carry, overflow) = AddWithCarry(SP, shifted, '0');
1379 APSR.V = overflow;
1695 (result, carry, overflow) = AddWithCarry(SP, NOT(imm32), '1');
1704 APSR.V = overflow;
1747 (result, carry, overflow) = AddWithCarry(SP, NOT(imm32), '1');
1756 APSR.V = overflow;
1801 (result, carry, overflow) = AddWithCarry(SP, NOT(imm32), '1');
1810 APSR.V = overflow;
1874 if (!WriteCoreRegOptionalFlags(context, res.result, Rd, setflags, res.carry_out, res.overflow))
2452 (result, carry, overflow) = AddWithCarry(R[n], imm32, '0');
2458 APSR.V = overflow;
2534 //(result, carry, overflow) = AddWithCarry(R[n], imm32, '0');
2549 //APSR.V = overflow;
2550 if (!WriteCoreRegOptionalFlags (context, res.result, d, setflags, res.carry_out, res.overflow))
2566 (result, carry, overflow) = AddWithCarry(R[n], imm32, '0');
2575 APSR.V = overflow;
2610 if (!WriteCoreRegOptionalFlags(context, res.result, Rd, setflags, res.carry_out, res.overflow))
2626 (result, carry, overflow) = AddWithCarry(R[n], shifted, '0');
2635 APSR.V = overflow;
2701 if (!WriteCoreRegOptionalFlags(context, res.result, Rd, setflags, res.carry_out, res.overflow))
2716 (result, carry, overflow) = AddWithCarry(R[n], imm32, '0');
2720 APSR.V = overflow;
2751 if (!WriteFlags(context, res.result, res.carry_out, res.overflow))
2767 (result, carry, overflow) = AddWithCarry(R[n], shifted, '0');
2771 APSR.V = overflow;
2821 if (!WriteFlags(context, res.result, res.carry_out, res.overflow))
2836 (result, carry, overflow) = AddWithCarry(R[n], NOT(imm32), '1');
2840 APSR.V = overflow;
2875 if (!WriteFlags(context, res.result, res.carry_out, res.overflow))
2891 (result, carry, overflow) = AddWithCarry(R[n], NOT(shifted), '1');
2895 APSR.V = overflow;
2947 if (!WriteFlags(context, res.result, res.carry_out, res.overflow))
5239 (result, carry, overflow) = AddWithCarry(R[n], imm32, APSR.C);
5248 APSR.V = overflow;
5292 if (!WriteCoreRegOptionalFlags(context, res.result, Rd, setflags, res.carry_out, res.overflow))
5309 (result, carry, overflow) = AddWithCarry(R[n], shifted, APSR.C);
5318 APSR.V = overflow;
5380 if (!WriteCoreRegOptionalFlags(context, res.result, Rd, setflags, res.carry_out, res.overflow))
8590 (result, carry, overflow) = AddWithCarry(NOT(R[n]), imm32, '1');
8599 APSR.V = overflow;
8647 if (!WriteCoreRegOptionalFlags(context, res.result, Rd, setflags, res.carry_out, res.overflow))
8663 (result, carry, overflow) = AddWithCarry(NOT(R[n]), shifted, '1');
8672 APSR.V = overflow;
8726 if (!WriteCoreRegOptionalFlags(context, res.result, Rd, setflags, res.carry_out, res.overflow))
8742 (result, carry, overflow) = AddWithCarry(NOT(R[n]), imm32, APSR.C);
8751 APSR.V = overflow;
8785 if (!WriteCoreRegOptionalFlags(context, res.result, Rd, setflags, res.carry_out, res.overflow))
8802 (result, carry, overflow) = AddWithCarry(NOT(R[n]), shifted, APSR.C);
8811 APSR.V = overflow;
8855 if (!WriteCoreRegOptionalFlags(context, res.result, Rd, setflags, res.carry_out, res.overflow))
8871 (result, carry, overflow) = AddWithCarry(R[n], NOT(imm32), APSR.C);
8880 APSR.V = overflow;
8922 if (!WriteCoreRegOptionalFlags(context, res.result, Rd, setflags, res.carry_out, res.overflow))
8939 (result, carry, overflow) = AddWithCarry(R[n], NOT(shifted), APSR.C);
8948 APSR.V = overflow;
9008 if (!WriteCoreRegOptionalFlags(context, res.result, Rd, setflags, res.carry_out, res.overflow))
9023 (result, carry, overflow) = AddWithCarry(R[n], NOT(imm32), '1');
9029 APSR.V = overflow;
9099 if (!WriteCoreRegOptionalFlags(context, res.result, Rd, setflags, res.carry_out, res.overflow))
9114 (result, carry, overflow) = AddWithCarry(R[n], NOT(imm32), '1');
9123 APSR.V = overflow;
9165 if (!WriteCoreRegOptionalFlags(context, res.result, Rd, setflags, res.carry_out, res.overflow))
9434 (result, carry, overflow) = AddWithCarry(SP, NOT(shifted), ?1?);
9443 APSR.V = overflow;
9503 // (result, carry, overflow) = AddWithCarry(SP, NOT(shifted), ?1?);
9518 if (!WriteCoreRegOptionalFlags(context, res.result, dwarf_r0 + d, setflags, res.carry_out, res.overflow))
9534 (result, carry, overflow) = AddWithCarry(R[n], shifted, ?0?);
9540 APSR.V = overflow;
9592 // (result, carry, overflow) = AddWithCarry(R[n], shifted, ?0?);
9616 // APSR.V = overflow;
9618 return WriteFlags (context, res.result, res.carry_out, res.overflow);
9631 (result, carry, overflow) = AddWithCarry(R[n], NOT(shifted), ?1?);
9640 APSR.V = overflow;
9717 // (result, carry, overflow) = AddWithCarry(R[n], NOT(shifted), ?1?);
9732 // APSR.V = overflow;
9742 if (!WriteCoreRegOptionalFlags (context, res.result, dwarf_r0 + d, setflags, res.carry_out, res.overflow))
13254 // about both unsigned carry and signed overflow conditions. This status
13261 uint8_t overflow;
13268 overflow = ((int32_t)result == signed_sum ? 0 : 1);
13275 AddWithCarryResult res = { result, carry_out, overflow };
13346 // In the above case, the API client does not pass in the overflow arg, which
13354 const uint32_t overflow)
13381 return WriteFlags (context, result, carry, overflow);
13392 // APSR.V = overflow
13394 // Default arguments can be specified for carry and overflow parameters, which means
13400 const uint32_t overflow)
13407 if (overflow != ~0u)
13408 SetBit32(m_new_inst_cpsr, CPSR_V_POS, overflow);
