Lines Matching refs:DefI
393 VReg2SUnitMap::iterator DefI = VRegDefs.find(Reg);394 if (DefI == VRegDefs.end())397 SUnit *DefSU = DefI->SU;404 DefI->SU = SU;455 VReg2SUnitMap::iterator DefI = VRegDefs.find(Reg);456 if (DefI != VRegDefs.end() && DefI->SU != SU)457 DefI->SU->addPred(SDep(SU, SDep::Anti, Reg));