Lines Matching defs:Def
106 if (!SlotIndex::isEarlierInstr(VNI->def, LSP.second) && VNI->def < MBBEnd)
131 UseSlots.push_back((*I)->def);
133 // Get use slots form the use-def chain.
214 // When not live in, the first use should be a def.
216 assert(LVI->start == LVI->valno->def && "Dangling Segment start");
217 assert(LVI->start == BI.FirstInstr && "First instr should be a def");
247 // A Segment that starts in the middle of the block must be a def.
248 assert(LVI->start == LVI->valno->def && "Dangling Segment start");
390 // Keep it as a simple def without any liveness.
396 SlotIndex Def = OldVNI->def;
397 LI->addSegment(LiveInterval::Segment(Def, Def.getDeadSlot(), OldVNI));
403 SlotIndex Def = VNI->def;
404 LI->addSegment(LiveInterval::Segment(Def, Def.getDeadSlot(), VNI));
421 // This was previously a single mapping. Make sure the old def is represented
423 SlotIndex Def = VNI->def;
425 LI->addSegment(LiveInterval::Segment(Def, Def.getDeadSlot(), VNI));
436 SlotIndex Def;
446 Def = Edit->rematerializeAt(MBB, I, LI->reg, RM, TRI, Late);
452 Def = LIS.getSlotIndexes()->insertMachineInstrInMaps(CopyMI, Late)
458 return defValue(RegIdx, ParentVNI, Def);
494 return VNI->def;
512 return VNI->def;
528 RegAssign.insert(VNI->def, End, OpenIdx);
530 return VNI->def;
564 if (SpillMode && !SlotIndex::isSameInstr(ParentVNI->def, Idx) &&
573 return VNI->def;
592 return VNI->def;
608 RegAssign.insert(Start, VNI->def, OpenIdx);
610 return VNI->def;
641 SlotIndex Def = VNI->def;
642 MachineInstr *MI = LIS.getInstructionFromIndex(Def);
651 DEBUG(dbgs() << "Removing " << Def << '\t' << *MI);
656 // Adjust RegAssign if a register assignment is killed at VNI->def. We
659 AssignI.find(Def.getPrevSlot());
660 if (!AssignI.valid() || AssignI.start() >= Def)
663 if (AssignI.stop() != Def)
668 forceRecompute(RegIdx, Edit->getParent().getVNInfoAt(Def));
682 assert(MDT.dominates(DefMBB, MBB) && "MBB must be dominated by the def.");
698 DEBUG(dbgs() << "Def in BB#" << DefMBB->getNumber() << " dominates BB#"
705 DEBUG(dbgs() << "Def in BB#" << DefMBB->getNumber() << " dominates BB#"
715 DEBUG(dbgs() << "Def in BB#" << DefMBB->getNumber() << " dominates BB#"
748 VNInfo *ParentVNI = Edit->getParent().getVNInfoAt(VNI->def);
749 assert(ParentVNI && "Parent not live at complement def");
756 MachineBasicBlock *ValMBB = LIS.getMBBFromIndex(VNI->def);
762 if (VNI->def == ParentVNI->def) {
763 DEBUG(dbgs() << "Direct complement def at " << VNI->def << '\n');
764 Dom = DomPair(ValMBB, VNI->def);
770 DEBUG(dbgs() << "Single complement def at " << VNI->def << '\n');
776 Dom = DomPair(ValMBB, VNI->def);
778 // Two defs in the same block. Pick the earlier def.
779 if (!Dom.second.isValid() || VNI->def < Dom.second)
780 Dom.second = VNI->def;
786 // Def ValMBB dominates.
787 Dom = DomPair(ValMBB, VNI->def);
789 // None dominate. Hoist to common dominator, need new def.
793 DEBUG(dbgs() << "Multi-mapped complement " << VNI->id << '@' << VNI->def
794 << " for parent " << ParentVNI->id << '@' << ParentVNI->def
806 MachineBasicBlock *DefMBB = LIS.getMBBFromIndex(ParentVNI->def);
812 SA.getLastSplitPointIter(Dom.first))->def;
816 // def with the same value.
823 VNInfo *ParentVNI = Edit->getParent().getVNInfoAt(VNI->def);
825 if (!Dom.first || Dom.second == VNI->def)
892 // The first block may be live-in, or it may have its own def.
895 assert(VNI && "Missing def for complex mapped value");
897 // MBB has its own def. Is it also live-out?
911 if (BlockStart == ParentVNI->def) {
912 // This block has the def of a parent PHI, so it isn't live-in.
915 assert(VNI && "Missing def for complex mapped parent PHI");
951 unsigned RegIdx = RegAssign.lookup(PHIVNI->def);
954 MachineBasicBlock *MBB = LIS.getMBBFromIndex(PHIVNI->def);
985 // which register we choose. When the use operand is tied to a def, we must
986 // use the same register as the def, so just do that always.
1025 if (LII->end != LII->valno->def.getDeadSlot())
1027 MachineInstr *MI = LIS.getInstructionFromIndex(LII->valno->def);
1028 assert(MI && "Missing instruction for dead def");
1057 unsigned RegIdx = RegAssign.lookup(ParentVNI->def);
1058 defValue(RegIdx, ParentVNI, ParentVNI->def);
1396 // >>>> Interference before def.
1408 // >>>> Interference before def.
