Lines Matching defs:V2
270 SDNode *createQuadSRegsNode(EVT VT, SDValue V0, SDValue V1, SDValue V2, SDValue V3);
271 SDNode *createQuadDRegsNode(EVT VT, SDValue V0, SDValue V1, SDValue V2, SDValue V3);
272 SDNode *createQuadQRegsNode(EVT VT, SDValue V0, SDValue V1, SDValue V2, SDValue V3);
1607 SDValue V2, SDValue V3) {
1616 V2, SubReg2, V3, SubReg3 };
1622 SDValue V2, SDValue V3) {
1630 V2, SubReg2, V3, SubReg3 };
1636 SDValue V2, SDValue V3) {
1644 V2, SubReg2, V3, SubReg3 };
1965 SDValue V2 = N->getOperand(Vec0Idx + 2);
1971 SrcReg = SDValue(createQuadDRegsNode(MVT::v4i64, V0, V1, V2, V3), 0);
2015 SDValue V2 = N->getOperand(Vec0Idx + 2);
2019 SDValue RegSeq = SDValue(createQuadQRegsNode(MVT::v8i64, V0, V1, V2, V3), 0);
2133 SDValue V2 = N->getOperand(Vec0Idx + 2);
2138 SuperReg = SDValue(createQuadDRegsNode(MVT::v4i64, V0, V1, V2, V3), 0);
2140 SuperReg = SDValue(createQuadQRegsNode(MVT::v8i64, V0, V1, V2, V3), 0);
2266 SDValue V2 = N->getOperand(FirstTblReg + 2);
2272 RegSeq = SDValue(createQuadDRegsNode(MVT::v4i64, V0, V1, V2, V3), 0);
