Lines Matching refs:Addr
145 bool PPCEmitLoad(MVT VT, unsigned &ResultReg, Address &Addr,
148 bool PPCEmitStore(MVT VT, unsigned SrcReg, Address &Addr);
149 bool PPCComputeAddress(const Value *Obj, Address &Addr);
150 void PPCSimplifyAddress(Address &Addr, MVT VT, bool &UseOffset,
281 // Given a value Obj, create an Address object Addr that represents its
283 bool PPCFastISel::PPCComputeAddress(const Value *Obj, Address &Addr) {
304 return PPCComputeAddress(U->getOperand(0), Addr);
308 return PPCComputeAddress(U->getOperand(0), Addr);
313 return PPCComputeAddress(U->getOperand(0), Addr);
316 Address SavedAddr = Addr;
317 long TmpOffset = Addr.Offset;
353 Addr.Offset = TmpOffset;
354 if (PPCComputeAddress(U->getOperand(0), Addr)) return true;
357 Addr = SavedAddr;
367 Addr.BaseType = Address::FrameIndexBase;
368 Addr.Base.FI = SI->second;
382 if (Addr.Base.Reg == 0)
383 Addr.Base.Reg = getRegForValue(Obj);
387 if (Addr.Base.Reg != 0)
388 MRI.setRegClass(Addr.Base.Reg, &PPC::G8RC_and_G8RC_NOX0RegClass);
390 return Addr.Base.Reg != 0;
396 void PPCFastISel::PPCSimplifyAddress(Address &Addr, MVT VT, bool &UseOffset,
400 if (!isInt<16>(Addr.Offset))
406 if (!UseOffset && Addr.BaseType == Address::FrameIndexBase) {
409 ResultReg).addFrameIndex(Addr.Base.FI).addImm(0);
410 Addr.Base.Reg = ResultReg;
411 Addr.BaseType = Address::RegBase;
418 ConstantInt::getSigned(OffsetTy, (int64_t)(Addr.Offset));
427 bool PPCFastISel::PPCEmitLoad(MVT VT, unsigned &ResultReg, Address &Addr,
465 if ((Opc == PPC::LWA || Opc == PPC::LWA_32) && ((Addr.Offset & 3) != 0))
472 UseOffset = ((Addr.Offset & 3) == 0);
485 PPCSimplifyAddress(Addr, VT, UseOffset, IndexReg);
492 if (Addr.BaseType == Address::FrameIndexBase) {
496 MachinePointerInfo::getFixedStack(Addr.Base.FI, Addr.Offset),
497 MachineMemOperand::MOLoad, MFI.getObjectSize(Addr.Base.FI),
498 MFI.getObjectAlignment(Addr.Base.FI));
501 .addImm(Addr.Offset).addFrameIndex(Addr.Base.FI).addMemOperand(MMO);
507 .addImm(Addr.Offset).addReg(Addr.Base.Reg);
531 .addReg(Addr.Base.Reg).addReg(IndexReg);
549 Address Addr;
550 if (!PPCComputeAddress(I->getOperand(0), Addr))
561 if (!PPCEmitLoad(VT, ResultReg, Addr, RC))
567 // Emit a store instruction to store SrcReg at Addr.
568 bool PPCFastISel::PPCEmitStore(MVT VT, unsigned SrcReg, Address &Addr) {
591 UseOffset = ((Addr.Offset & 3) == 0);
604 PPCSimplifyAddress(Addr, VT, UseOffset, IndexReg);
609 if (Addr.BaseType == Address::FrameIndexBase) {
612 MachinePointerInfo::getFixedStack(Addr.Base.FI, Addr.Offset),
613 MachineMemOperand::MOStore, MFI.getObjectSize(Addr.Base.FI),
614 MFI.getObjectAlignment(Addr.Base.FI));
618 .addImm(Addr.Offset)
619 .addFrameIndex(Addr.Base.FI)
625 .addReg(SrcReg).addImm(Addr.Offset).addReg(Addr.Base.Reg);
645 .addReg(SrcReg).addReg(Addr.Base.Reg).addReg(IndexReg);
671 Address Addr;
672 if (!PPCComputeAddress(I->getOperand(1), Addr))
675 if (!PPCEmitStore(VT, SrcReg, Addr))
886 Address Addr;
887 Addr.BaseType = Address::FrameIndexBase;
888 Addr.Base.FI = MFI.CreateStackObject(8, 8, false);
891 if (!PPCEmitStore(MVT::i64, SrcReg, Addr))
901 Addr.Offset = 4;
904 Addr.Offset = 4;
910 if (!PPCEmitLoad(MVT::f64, ResultReg, Addr, RC, !IsSigned, LoadOpc))
997 Address Addr;
998 Addr.BaseType = Address::FrameIndexBase;
999 Addr.Base.FI = MFI.CreateStackObject(8, 8, false);
1002 if (!PPCEmitStore(MVT::f64, SrcReg, Addr))
1008 Addr.Offset = 4;
1017 if (!PPCEmitLoad(VT, ResultReg, Addr, RC, !IsSigned))
2155 Address Addr;
2156 if (!PPCComputeAddress(LI->getOperand(0), Addr))
2161 if (!PPCEmitLoad(VT, ResultReg, Addr, nullptr, IsZExt))
