Lines Matching refs:getOpcode
1278 if (SrcReg->getReg() == Reg && Chain->getOpcode() == ISD::CopyFromReg)
1720 switch (Op.getOpcode()) {
1742 (((LHS.getOpcode() == SPISD::SELECT_ICC ||
1743 LHS.getOpcode() == SPISD::SELECT_XCC) &&
1744 LHS.getOperand(3).getOpcode() == SPISD::CMPICC) ||
1745 (LHS.getOpcode() == SPISD::SELECT_FCC &&
1746 LHS.getOperand(3).getOpcode() == SPISD::CMPFCC)) &&
2547 assert(LdNode && LdNode->getOffset().getOpcode() == ISD::UNDEF
2597 assert(StNode && StNode->getOffset().getOpcode() == ISD::UNDEF
2638 assert((Op.getOpcode() == ISD::FNEG || Op.getOpcode() == ISD::FABS)
2642 return LowerF64Op(Op, DAG, Op.getOpcode());
2656 Hi64 = DAG.getNode(Op.getOpcode(), dl, MVT::f64, Hi64);
2658 Hi64 = LowerF64Op(Hi64, DAG, Op.getOpcode());
2689 unsigned hiOpc = Op.getOpcode();
2690 switch (Op.getOpcode()) {
2700 Lo = DAG.getNode(Op.getOpcode(), dl, VTs, Src1Lo, Src2Lo,
2703 Lo = DAG.getNode(Op.getOpcode(), dl, VTs, Src1Lo, Src2Lo);
2723 unsigned opcode = Op.getOpcode();
2781 switch (Op.getOpcode()) {
2839 switch (MI->getOpcode()) {
3036 if (MI->getOpcode() == SP::ATOMIC_LOAD_NAND_32 ||
3037 MI->getOpcode() == SP::ATOMIC_LOAD_NAND_64) {
3179 switch (N->getOpcode()) {
3189 libCall = ((N->getOpcode() == ISD::FP_TO_SINT)
3206 libCall = ((N->getOpcode() == ISD::SINT_TO_FP)
