Lines Matching refs:getOpcode
1138 C.Op0.getOpcode() != ISD::LOAD ||
1139 C.Op1.getOpcode() != ISD::Constant)
1269 unsigned Opcode0 = C.Op0.getOpcode();
1276 C.Op0.getOperand(1).getOpcode() == ISD::Constant &&
1300 if (N->getOpcode() == ISD::SUB &&
1320 if (N->getOpcode() == ISD::FNEG) {
1337 if (C.Op0.getOpcode() == ISD::SHL &&
1339 C.Op1.getOpcode() == ISD::Constant &&
1347 if (N->getOpcode() == ISD::SIGN_EXTEND_INREG &&
1361 if (C.Op0.getOpcode() == ISD::TRUNCATE &&
1362 C.Op0.getOperand(0).getOpcode() == ISD::LOAD &&
1363 C.Op1.getOpcode() == ISD::Constant &&
1502 if (C.Op0.getOpcode() == ISD::AND) {
1537 NewC.Op0.getOpcode() == ISD::SHL &&
1546 NewC.Op0.getOpcode() == ISD::SRL &&
1714 return (Neg.getOpcode() == ISD::SUB &&
1715 Neg.getOperand(0).getOpcode() == ISD::Constant &&
1719 (Pos.getOpcode() == ISD::SIGN_EXTEND &&
1750 C.Op1.getOpcode() == ISD::Constant &&
2158 if (HighOp.getOpcode() == ISD::Constant)
2163 if (LowOp.getOpcode() == ISD::Constant) {
2171 if (HighOp.getOpcode() == ISD::AND &&
2172 HighOp.getOperand(1).getOpcode() == ISD::Constant) {
2404 switch (Op.getOpcode()) {
2534 unsigned Opcode = N->getOpcode();
2541 if (N0.hasOneUse() && N0.getOpcode() == ISD::SRA) {
2544 if (SraAmt && Inner.hasOneUse() && Inner.getOpcode() == ISD::SHL) {
3346 switch (MI->getOpcode()) {
