Lines Matching full:pshufhw
3366 case X86ISD::PSHUFHW:
3406 PSHUFHW:
3701 /// is suitable for input to PSHUFHW.
4608 /// the specified VECTOR_SHUFFLE mask with the PSHUFHW instruction.
4613 "Unsupported vector type for PSHUFHW");
4637 "Unsupported vector type for PSHUFHW");
5147 case X86ISD::PSHUFHW:
7401 V = DAG.getNode(X86ISD::PSHUFHW, DL, MVT::v8i16, V,
7428 V = DAG.getNode(X86ISD::PSHUFHW, DL, MVT::v8i16, V,
8143 // 1. [all] pshuflw, pshufhw, optional move
8146 // 4. [all] mov + pshuflw + pshufhw + N x (pextrw + pinsrw)
8244 bool pshuflw = AllWordsInNewV, pshufhw = AllWordsInNewV;
8252 pshufhw = false;
8263 // pshufhw, that's as cheap as it gets. Return the new shuffle.
8264 if ((pshufhw && InOrder[0]) || (pshuflw && InOrder[1])) {
8265 unsigned Opc = pshufhw ? X86ISD::PSHUFHW : X86ISD::PSHUFLW;
8270 TargetMask = pshufhw ? getShufflePSHUFHWImmediate(SVOp):
8330 // If BestHi >= 0, generate a pshufhw to put the high elements in order,
8348 NewV = getTargetShuffleNode(X86ISD::PSHUFHW, dl, MVT::v8i16,
9478 return getTargetShuffleNode(X86ISD::PSHUFHW, dl, VT, V1,
13819 return DAG.getNode(X86ISD::PSHUFHW, dl, Op.getValueType(),
16597 case X86ISD::PSHUFHW: return "X86ISD::PSHUFHW";
18440 case X86ISD::PSHUFHW:
18487 case X86ISD::PSHUFHW:
18505 V.getOpcode() == X86ISD::UNPCKL ? X86ISD::PSHUFLW : X86ISD::PSHUFHW;
18516 case X86ISD::PSHUFHW:
18563 /// \brief Search for a combinable shuffle across a chain ending in pshuflw or pshufhw.
18572 (N.getOpcode() == X86ISD::PSHUFLW || N.getOpcode() == X86ISD::PSHUFHW) &&
18590 case X86ISD::PSHUFHW:
18613 VMask[DOffset + Mask[0] / 2] < 2 ? X86ISD::PSHUFLW : X86ISD::PSHUFHW;
18656 case X86ISD::PSHUFHW:
18674 case X86ISD::PSHUFHW:
18702 V.getOpcode() == X86ISD::PSHUFHW) &&
22017 case X86ISD::PSHUFHW:
