Lines Matching refs:override
522 unsigned getJumpTableEncoding() const override;
524 MVT getScalarShiftAmountTy(EVT LHSTy) const override { return MVT::i8; }
529 MCContext &Ctx) const override;
534 SelectionDAG &DAG) const override;
537 unsigned JTI, MCContext &Ctx) const override;
543 unsigned getByValTypeAlignment(Type *Ty) const override;
558 MachineFunction &MF) const override;
566 bool isSafeMemOpType(MVT VT) const override;
572 bool *Fast) const override;
576 SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const override;
582 SelectionDAG &DAG) const override;
585 SDValue PerformDAGCombine(SDNode *N, DAGCombinerInfo &DCI) const override;
591 bool isTypeDesirableForOp(unsigned Opc, EVT VT) const override;
597 bool IsDesirableToPromoteOp(SDValue Op, EVT &PVT) const override;
601 MachineBasicBlock *MBB) const override;
606 const char *getTargetNodeName(unsigned Opcode) const override;
609 EVT getSetCCResultType(LLVMContext &Context, EVT VT) const override;
618 unsigned Depth = 0) const override;
624 unsigned Depth) const override;
627 int64_t &Offset) const override;
631 bool ExpandInlineAsm(CallInst *CI) const override;
634 getConstraintType(const std::string &Constraint) const override;
640 const char *constraint) const override;
642 const char *LowerXConstraint(EVT ConstraintVT) const override;
651 SelectionDAG &DAG) const override;
659 MVT VT) const override;
663 bool isLegalAddressingMode(const AddrMode &AM, Type *Ty) const override;
669 bool isLegalICmpImmediate(int64_t Imm) const override;
675 bool isLegalAddImmediate(int64_t Imm) const override;
682 int getScalingFactorCost(const AddrMode &AM, Type *Ty) const override;
684 bool isVectorShiftByScalarCheap(Type *Ty) const override;
689 bool isTruncateFree(Type *Ty1, Type *Ty2) const override;
690 bool isTruncateFree(EVT VT1, EVT VT2) const override;
692 bool allowTruncateForTailCall(Type *Ty1, Type *Ty2) const override;
702 bool isZExtFree(Type *Ty1, Type *Ty2) const override;
703 bool isZExtFree(EVT VT1, EVT VT2) const override;
704 bool isZExtFree(SDValue Val, EVT VT2) const override;
710 bool isFMAFasterThanFMulAndFAdd(EVT VT) const override;
715 bool isNarrowingProfitable(EVT VT1, EVT VT2) const override;
720 bool isFPImmLegal(const APFloat &Imm, EVT VT) const override;
727 EVT VT) const override;
734 EVT VT) const override;
739 bool ShouldShrinkFPConstant(EVT VT) const override {
770 Type *Ty) const override;
773 const char * getClearCacheBuiltinName() const override {
777 unsigned getRegisterByName(const char* RegName, EVT VT) const override;
782 const TargetLibraryInfo *libInfo) const override;
789 unsigned &Offset) const override;
794 bool isNoopAddrSpaceCast(unsigned SrcAS, unsigned DestAS) const override;
797 void resetOperationActions() override;
800 LegalizeTypeAction getPreferredVectorAction(EVT VT) const override;
804 findRepresentativeClass(MVT VT) const override;
925 SmallVectorImpl<SDValue> &InVals) const override;
927 SmallVectorImpl<SDValue> &InVals) const override;
933 SDLoc dl, SelectionDAG &DAG) const override;
935 bool isUsedByReturnOnly(SDNode *N, SDValue &Chain) const override;
937 bool mayBeEmittedAsTailCall(CallInst *CI) const override;
940 ISD::NodeType ExtendKind) const override;
945 LLVMContext &Context) const override;
947 const MCPhysReg *getScratchRegisters(CallingConv::ID CC) const override;
