Lines Matching full:src3
2582 (ins RC:$src1, x86memop:$src2, i8imm:$src3), asm,
2584 (i8 imm:$src3))))], IIC_SSE_SHUFP, d>,
2588 (ins RC:$src1, RC:$src2, i8imm:$src3), asm,
2590 (i8 imm:$src3))))], IIC_SSE_SHUFP, d>,
2595 "shufps\t{$src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3}",
2598 "shufps\t{$src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3}",
2601 "shufpd\t{$src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3}",
2604 "shufpd\t{$src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3}",
2609 "shufps\t{$src3, $src2, $dst|$dst, $src2, $src3}",
2612 "shufpd\t{$src3, $src2, $dst|$dst, $src2, $src3}",
4660 GR32orGR64:$src2, i32i8imm:$src3),
4662 "pinsrw\t{$src3, $src2, $dst|$dst, $src2, $src3}",
4663 "vpinsrw\t{$src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3}"),
4665 (X86pinsrw VR128:$src1, GR32orGR64:$src2, imm:$src3))],
4669 i16mem:$src2, i32i8imm:$src3),
4671 "pinsrw\t{$src3, $src2, $dst|$dst, $src2, $src3}",
4672 "vpinsrw\t{$src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3}"),
4675 imm:$src3))], IIC_SSE_PINSRW>,
5815 (ins VR128:$src1, VR128:$src2, i8imm:$src3),
5817 !strconcat(asm, "\t{$src3, $src2, $dst|$dst, $src2, $src3}"),
5819 "\t{$src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3}")),
5823 (ins VR128:$src1, i128mem:$src2, i8imm:$src3),
5825 !strconcat(asm, "\t{$src3, $src2, $dst|$dst, $src2, $src3}"),
5827 "\t{$src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3}")),
5835 (ins VR256:$src1, VR256:$src2, i8imm:$src3),
5837 "\t{$src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3}"),
5841 (ins VR256:$src1, i256mem:$src2, i8imm:$src3),
5843 "\t{$src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3}"),
5894 def MONITOR : PseudoI<(outs), (ins i32mem:$src1, GR32:$src2, GR32:$src3),
5895 [(int_x86_sse3_monitor addr:$src1, GR32:$src2, GR32:$src3)]>,
6612 (ins VR128:$src1, GR32orGR64:$src2, i32i8imm:$src3),
6614 !strconcat(asm, "\t{$src3, $src2, $dst|$dst, $src2, $src3}"),
6616 "\t{$src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3}")),
6618 (X86pinsrb VR128:$src1, GR32orGR64:$src2, imm:$src3))]>,
6621 (ins VR128:$src1, i8mem:$src2, i32i8imm:$src3),
6623 !strconcat(asm, "\t{$src3, $src2, $dst|$dst, $src2, $src3}"),
6625 "\t{$src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3}")),
6628 imm:$src3))]>, Sched<[WriteShuffleLd, ReadAfterLd]>;
6638 (ins VR128:$src1, GR32:$src2, i32i8imm:$src3),
6640 !strconcat(asm, "\t{$src3, $src2, $dst|$dst, $src2, $src3}"),
6642 "\t{$src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3}")),
6644 (v4i32 (insertelt VR128:$src1, GR32:$src2, imm:$src3)))]>,
6647 (ins VR128:$src1, i32mem:$src2, i32i8imm:$src3),
6649 !strconcat(asm, "\t{$src3, $src2, $dst|$dst, $src2, $src3}"),
6651 "\t{$src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3}")),
6654 imm:$src3)))]>, Sched<[WriteShuffleLd, ReadAfterLd]>;
6664 (ins VR128:$src1, GR64:$src2, i32i8imm:$src3),
6666 !strconcat(asm, "\t{$src3, $src2, $dst|$dst, $src2, $src3}"),
6668 "\t{$src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3}")),
6670 (v2i64 (insertelt VR128:$src1, GR64:$src2, imm:$src3)))]>,
6673 (ins VR128:$src1, i64mem:$src2, i32i8imm:$src3),
6675 !strconcat(asm, "\t{$src3, $src2, $dst|$dst, $src2, $src3}"),
6677 "\t{$src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3}")),
6680 imm:$src3)))]>, Sched<[WriteShuffleLd, ReadAfterLd]>;
6695 (ins VR128:$src1, VR128:$src2, u32u8imm:$src3),
6697 !strconcat(asm, "\t{$src3, $src2, $dst|$dst, $src2, $src3}"),
6699 "\t{$src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3}")),
6701 (X86insertps VR128:$src1, VR128:$src2, imm:$src3))], itins.rr>,
6704 (ins VR128:$src1, f32mem:$src2, u32u8imm:$src3),
6706 !strconcat(asm, "\t{$src3, $src2, $dst|$dst, $src2, $src3}"),
6708 "\t{$src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3}")),
6712 imm:$src3))], itins.rm>,
6728 imm:$src3)),
6729 (INSERTPSrm VR128:$src1, addr:$src2, imm:$src3)>;
6731 (loadv4f32 addr:$src2), (i8 0)), imm:$src3)),
6732 (INSERTPSrm VR128:$src1, addr:$src2, imm:$src3)>;
6739 (X86VBroadcast (loadf32 addr:$src2)), imm:$src3)),
6740 (VINSERTPSrm VR128:$src1, addr:$src2, imm:$src3)>;
6742 (X86VBroadcast (loadv4f32 addr:$src2)), imm:$src3)),
6743 (VINSERTPSrm VR128:$src1, addr:$src2, imm:$src3)>;
6802 (outs FR32:$dst), (ins FR32:$src1, FR32:$src2, i32i8imm:$src3),
6805 "ss\t{$src3, $src2, $dst|$dst, $src2, $src3}"),
6807 "ss\t{$src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3}")),
6813 (outs VR128:$dst), (ins VR128:$src1, VR128:$src2, i32i8imm:$src3),
6816 "ss\t{$src3, $src2, $dst|$dst, $src2, $src3}"),
6818 "ss\t{$src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3}")),
6819 [(set VR128:$dst, (F32Int VR128:$src1, VR128:$src2, imm:$src3))]>,
6824 (outs VR128:$dst), (ins VR128:$src1, ssmem:$src2, i32i8imm:$src3),
6827 "ss\t{$src3, $src2, $dst|$dst, $src2, $src3}"),
6829 "ss\t{$src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3}")),
6831 (F32Int VR128:$src1, sse_load_f32:$src2, imm:$src3))]>,
6837 (outs FR64:$dst), (ins FR64:$src1, FR64:$src2, i32i8imm:$src3),
6840 "sd\t{$src3, $src2, $dst|$dst, $src2, $src3}"),
6842 "sd\t{$src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3}")),
6848 (outs VR128:$dst), (ins VR128:$src1, VR128:$src2, i32i8imm:$src3),
6851 "sd\t{$src3, $src2, $dst|$dst, $src2, $src3}"),
6853 "sd\t{$src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3}")),
6854 [(set VR128:$dst, (F64Int VR128:$src1, VR128:$src2, imm:$src3))]>,
6859 (outs VR128:$dst), (ins VR128:$src1, sdmem:$src2, i32i8imm:$src3),
6862 "sd\t{$src3, $src2, $dst|$dst, $src2, $src3}"),
6864 "sd\t{$src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3}")),
6866 (F64Int VR128:$src1, sse_load_f64:$src2, imm:$src3))]>,
7340 (ins RC:$src1, RC:$src2, u32u8imm:$src3),
7343 "\t{$src3, $src2, $dst|$dst, $src2, $src3}"),
7345 "\t{$src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3}")),
7346 [(set RC:$dst, (IntId RC:$src1, RC:$src2, imm:$src3))], itins.rr>,
7349 (ins RC:$src1, x86memop:$src2, u32u8imm:$src3),
7352 "\t{$src3, $src2, $dst|$dst, $src2, $src3}"),
7354 "\t{$src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3}")),
7357 (bitconvert (memop_frag addr:$src2)), imm:$src3))], itins.rm>,
7446 (ins RC:$src1, RC:$src2, RC:$src3),
7448 "\t{$src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3}"),
7449 [(set RC:$dst, (IntId RC:$src1, RC:$src2, RC:$src3))],
7454 (ins RC:$src1, x86memop:$src2, RC:$src3),
7456 "\t{$src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3}"),
7459 RC:$src3))],
7681 (ins VR128:$src1, VR128:$src2, i8imm:$src3),
7683 imm:$src3))]>;
7685 (ins VR128:$src1, i128mem:$src2, i8imm:$src3),
7687 (bc_v16i8 (memopv2i64 addr:$src2)), imm:$src3))]>;
7697 (ins VR128:$src1, VR128:$src2, i8imm:$src3),
7698 !strconcat(asm, "\t{$src3, $src2, $src1|$src1, $src2, $src3}"),
7702 (ins VR128:$src1, i128mem:$src2, i8imm:$src3),
7703 !strconcat(asm, "\t{$src3, $src2, $src1|$src1, $src2, $src3}"),
7716 (ins VR128:$src1, VR128:$src3, i8imm:$src5),
7718 VR128:$src1, EAX, VR128:$src3, EDX, imm:$src5))]>;
7720 (ins VR128:$src1, i128mem:$src3, i8imm:$src5),
7722 (bc_v16i8 (memopv2i64 addr:$src3)), EDX, imm:$src5))]>;
7732 (ins VR128:$src1, VR128:$src3, i8imm:$src5),
7733 !strconcat(asm, "\t{$src5, $src3, $src1|$src1, $src3, $src5}"),
7737 (ins VR128:$src1, i128mem:$src3, i8imm:$src5),
7738 !strconcat(asm, "\t{$src5, $src3, $src1|$src1, $src3, $src5}"),
7751 (ins VR128:$src1, VR128:$src2, i8imm:$src3),
7753 (X86pcmpistri VR128:$src1, VR128:$src2, imm:$src3))]>;
7755 (ins VR128:$src1, i128mem:$src2, i8imm:$src3),
7757 (bc_v16i8 (memopv2i64 addr:$src2)), imm:$src3))]>;
7767 (ins VR128:$src1, VR128:$src2, i8imm:$src3),
7768 !strconcat(asm, "\t{$src3, $src2, $src1|$src1, $src2, $src3}"),
7772 (ins VR128:$src1, i128mem:$src2, i8imm:$src3),
7773 !strconcat(asm, "\t{$src3, $src2, $src1|$src1, $src2, $src3}"),
7786 (ins VR128:$src1, VR128:$src3, i8imm:$src5),
7788 (X86pcmpestri VR128:$src1, EAX, VR128:$src3, EDX, imm:$src5))]>;
7790 (ins VR128:$src1, i128mem:$src3, i8imm:$src5),
7792 (X86pcmpestri VR128:$src1, EAX, (bc_v16i8 (memopv2i64 addr:$src3)), EDX,
7803 (ins VR128:$src1, VR128:$src3, i8imm:$src5),
7804 !strconcat(asm, "\t{$src5, $src3, $src1|$src1, $src3, $src5}"),
7808 (ins VR128:$src1, i128mem:$src3, i8imm:$src5),
7809 !strconcat(asm, "\t{$src5, $src3, $src1|$src1, $src3, $src5}"),
7893 (ins VR128:$src1, VR128:$src2, i8imm:$src3),
7894 "sha1rnds4\t{$src3, $src2, $dst|$dst, $src2, $src3}",
7897 (i8 imm:$src3)))]>, TA;
7899 (ins VR128:$src1, i128mem:$src2, i8imm:$src3),
7900 "sha1rnds4\t{$src3, $src2, $dst|$dst, $src2, $src3}",
7904 (i8 imm:$src3)))]>, TA;
8028 (ins VR128:$src1, VR128:$src2, i8imm:$src3),
8029 "vpclmulqdq\t{$src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3}",
8031 (int_x86_pclmulqdq VR128:$src1, VR128:$src2, imm:$src3))]>,
8035 (ins VR128:$src1, i128mem:$src2, i8imm:$src3),
8036 "vpclmulqdq\t{$src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3}",
8038 (loadv2i64 addr:$src2), imm:$src3))]>,
8044 (ins VR128:$src1, VR128:$src2, i8imm:$src3),
8045 "pclmulqdq\t{$src3, $src2, $dst|$dst, $src2, $src3}",
8047 (int_x86_pclmulqdq VR128:$src1, VR128:$src2, imm:$src3))],
8051 (ins VR128:$src1, i128mem:$src2, i8imm:$src3),
8052 "pclmulqdq\t{$src3, $src2, $dst|$dst, $src2, $src3}",
8054 (memopv2i64 addr:$src2), imm:$src3))],
8194 (ins VR256:$src1, VR128:$src2, i8imm:$src3),
8195 "vinsertf128\t{$src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3}",
8199 (ins VR256:$src1, f128mem:$src2, i8imm:$src3),
8200 "vinsertf128\t{$src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3}",
8441 (ins VR256:$src1, VR256:$src2, i8imm:$src3),
8442 "vperm2f128\t{$src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3}",
8444 (i8 imm:$src3))))]>, VEX_4V, VEX_L,
8447 (ins VR256:$src1, f256mem:$src2, i8imm:$src3),
8448 "vperm2f128\t{$src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3}",
8450 (i8 imm:$src3)))]>, VEX_4V, VEX_L,
8566 (ins RC:$src1, RC:$src2, u32u8imm:$src3),
8568 "\t{$src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3}"),
8569 [(set RC:$dst, (IntId RC:$src1, RC:$src2, imm:$src3))]>,
8572 (ins RC:$src1, x86memop:$src2, u32u8imm:$src3),
8574 "\t{$src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3}"),
8577 (bitconvert (memop_frag addr:$src2)), imm:$src3))]>,
8815 (ins VR256:$src1, VR256:$src2, i8imm:$src3),
8816 "vperm2i128\t{$src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3}",
8818 (i8 imm:$src3))))]>, Sched<[WriteShuffle256]>,
8821 (ins VR256:$src1, f256mem:$src2, i8imm:$src3),
8822 "vperm2i128\t{$src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3}",
8824 (i8 imm:$src3)))]>,
8852 (ins VR256:$src1, VR128:$src2, i8imm:$src3),
8853 "vinserti128\t{$src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3}",
8857 (ins VR256:$src1, i128mem:$src2, i8imm:$src3),
8858 "vinserti128\t{$src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3}",
