Lines Matching refs:Address
43 uint64_t address,
51 uint64_t address,
57 if (region.readBytes(address, 2, Bytes) == -1) {
67 uint64_t address,
73 if (region.readBytes(address, 4, Bytes) == -1) {
91 uint64_t Address,
96 uint64_t Address,
100 uint64_t Address, const void *Decoder);
103 uint64_t Address, const void *Decoder);
107 uint64_t Address,
112 uint64_t Address,
117 uint64_t Address,
122 uint64_t Address,
127 uint64_t Address,
132 uint64_t Address,
137 uint64_t Address,
142 uint64_t Address,
147 uint64_t Address,
152 uint64_t Address,
157 uint64_t Address,
162 uint64_t Address,
167 uint64_t Address,
172 uint64_t Address,
177 uint64_t Address,
182 uint64_t Address,
187 uint64_t Address,
192 uint64_t Address,
197 uint64_t Address,
202 uint64_t Address,
207 uint64_t Address,
214 uint64_t Address,
226 uint64_t Address,
237 uint64_t Address, const void *Decoder) {
248 uint64_t Address, const void *Decoder) {
288 Decode2OpInstructionFail(MCInst &Inst, unsigned Insn, uint64_t Address,
295 return Decode2RUSInstruction(Inst, Insn, Address, Decoder);
298 return Decode2RUSInstruction(Inst, Insn, Address, Decoder);
301 return Decode3RInstruction(Inst, Insn, Address, Decoder);
304 return Decode3RInstruction(Inst, Insn, Address, Decoder);
307 return Decode3RInstruction(Inst, Insn, Address, Decoder);
310 return Decode3RInstruction(Inst, Insn, Address, Decoder);
313 return Decode3RInstruction(Inst, Insn, Address, Decoder);
316 return Decode3RInstruction(Inst, Insn, Address, Decoder);
319 return Decode3RInstruction(Inst, Insn, Address, Decoder);
322 return Decode3RInstruction(Inst, Insn, Address, Decoder);
325 return Decode3RInstruction(Inst, Insn, Address, Decoder);
328 return Decode3RInstruction(Inst, Insn, Address, Decoder);
331 return Decode2RUSInstruction(Inst, Insn, Address, Decoder);
334 return Decode2RUSInstruction(Inst, Insn, Address, Decoder);
337 return Decode2RUSBitpInstruction(Inst, Insn, Address, Decoder);
340 return Decode2RUSBitpInstruction(Inst, Insn, Address, Decoder);
343 return Decode2RUSInstruction(Inst, Insn, Address, Decoder);
346 return Decode3RImmInstruction(Inst, Insn, Address, Decoder);
349 return Decode3RInstruction(Inst, Insn, Address, Decoder);
352 return Decode3RInstruction(Inst, Insn, Address, Decoder);
358 Decode2RInstruction(MCInst &Inst, unsigned Insn, uint64_t Address,
363 return Decode2OpInstructionFail(Inst, Insn, Address, Decoder);
365 DecodeGRRegsRegisterClass(Inst, Op1, Address, Decoder);
366 DecodeGRRegsRegisterClass(Inst, Op2, Address, Decoder);
371 Decode2RImmInstruction(MCInst &Inst, unsigned Insn, uint64_t Address,
376 return Decode2OpInstructionFail(Inst, Insn, Address, Decoder);
379 DecodeGRRegsRegisterClass(Inst, Op2, Address, Decoder);
384 DecodeR2RInstruction(MCInst &Inst, unsigned Insn, uint64_t Address,
389 return Decode2OpInstructionFail(Inst, Insn, Address, Decoder);
391 DecodeGRRegsRegisterClass(Inst, Op1, Address, Decoder);
392 DecodeGRRegsRegisterClass(Inst, Op2, Address, Decoder);
397 Decode2RSrcDstInstruction(MCInst &Inst, unsigned Insn, uint64_t Address,
402 return Decode2OpInstructionFail(Inst, Insn, Address, Decoder);
404 DecodeGRRegsRegisterClass(Inst, Op1, Address, Decoder);
405 DecodeGRRegsRegisterClass(Inst, Op1, Address, Decoder);
406 DecodeGRRegsRegisterClass(Inst, Op2, Address, Decoder);
411 DecodeRUSInstruction(MCInst &Inst, unsigned Insn, uint64_t Address,
416 return Decode2OpInstructionFail(Inst, Insn, Address, Decoder);
418 DecodeGRRegsRegisterClass(Inst, Op1, Address, Decoder);
424 DecodeRUSBitpInstruction(MCInst &Inst, unsigned Insn, uint64_t Address,
429 return Decode2OpInstructionFail(Inst, Insn, Address, Decoder);
431 DecodeGRRegsRegisterClass(Inst, Op1, Address, Decoder);
432 DecodeBitpOperand(Inst, Op2, Address, Decoder);
437 DecodeRUSSrcDstBitpInstruction(MCInst &Inst, unsigned Insn, uint64_t Address,
442 return Decode2OpInstructionFail(Inst, Insn, Address, Decoder);
444 DecodeGRRegsRegisterClass(Inst, Op1, Address, Decoder);
445 DecodeGRRegsRegisterClass(Inst, Op1, Address, Decoder);
446 DecodeBitpOperand(Inst, Op2, Address, Decoder);
451 DecodeL2OpInstructionFail(MCInst &Inst, unsigned Insn, uint64_t Address,
459 return DecodeL3RInstruction(Inst, Insn, Address, Decoder);
462 return DecodeL3RInstruction(Inst, Insn, Address, Decoder);
465 return DecodeL3RInstruction(Inst, Insn, Address, Decoder);
468 return DecodeL3RInstruction(Inst, Insn, Address, Decoder);
471 return DecodeL3RInstruction(Inst, Insn, Address, Decoder);
474 return DecodeL3RInstruction(Inst, Insn, Address, Decoder);
477 return DecodeL3RInstruction(Inst, Insn, Address, Decoder);
480 return DecodeL3RInstruction(Inst, Insn, Address, Decoder);
483 return DecodeL3RInstruction(Inst, Insn, Address, Decoder);
486 return DecodeL3RInstruction(Inst, Insn, Address, Decoder);
489 return DecodeL3RInstruction(Inst, Insn, Address, Decoder);
492 return DecodeL3RInstruction(Inst, Insn, Address, Decoder);
495 return DecodeL2RUSBitpInstruction(Inst, Insn, Address, Decoder);
498 return DecodeL2RUSBitpInstruction(Inst, Insn, Address, Decoder);
501 return DecodeL2RUSBitpInstruction(Inst, Insn, Address, Decoder);
504 return DecodeL2RUSInstruction(Inst, Insn, Address, Decoder);
507 return DecodeL2RUSInstruction(Inst, Insn, Address, Decoder);
510 return DecodeL3RSrcDstInstruction(Inst, Insn, Address, Decoder);
513 return DecodeL3RInstruction(Inst, Insn, Address, Decoder);
516 return DecodeL3RInstruction(Inst, Insn, Address, Decoder);
522 DecodeL2RInstruction(MCInst &Inst, unsigned Insn, uint64_t Address,
528 return DecodeL2OpInstructionFail(Inst, Insn, Address, Decoder);
530 DecodeGRRegsRegisterClass(Inst, Op1, Address, Decoder);
531 DecodeGRRegsRegisterClass(Inst, Op2, Address, Decoder);
536 DecodeLR2RInstruction(MCInst &Inst, unsigned Insn, uint64_t Address,
542 return DecodeL2OpInstructionFail(Inst, Insn, Address, Decoder);
544 DecodeGRRegsRegisterClass(Inst, Op2, Address, Decoder);
545 DecodeGRRegsRegisterClass(Inst, Op1, Address, Decoder);
550 Decode3RInstruction(MCInst &Inst, unsigned Insn, uint64_t Address,
555 DecodeGRRegsRegisterClass(Inst, Op1, Address, Decoder);
556 DecodeGRRegsRegisterClass(Inst, Op2, Address, Decoder);
557 DecodeGRRegsRegisterClass(Inst, Op3, Address, Decoder);
563 Decode3RImmInstruction(MCInst &Inst, unsigned Insn, uint64_t Address,
569 DecodeGRRegsRegisterClass(Inst, Op2, Address, Decoder);
570 DecodeGRRegsRegisterClass(Inst, Op3, Address, Decoder);
576 Decode2RUSInstruction(MCInst &Inst, unsigned Insn, uint64_t Address,
581 DecodeGRRegsRegisterClass(Inst, Op1, Address, Decoder);
582 DecodeGRRegsRegisterClass(Inst, Op2, Address, Decoder);
589 Decode2RUSBitpInstruction(MCInst &Inst, unsigned Insn, uint64_t Address,
594 DecodeGRRegsRegisterClass(Inst, Op1, Address, Decoder);
595 DecodeGRRegsRegisterClass(Inst, Op2, Address, Decoder);
596 DecodeBitpOperand(Inst, Op3, Address, Decoder);
602 DecodeL3RInstruction(MCInst &Inst, unsigned Insn, uint64_t Address,
608 DecodeGRRegsRegisterClass(Inst, Op1, Address, Decoder);
609 DecodeGRRegsRegisterClass(Inst, Op2, Address, Decoder);
610 DecodeGRRegsRegisterClass(Inst, Op3, Address, Decoder);
616 DecodeL3RSrcDstInstruction(MCInst &Inst, unsigned Insn, uint64_t Address,
622 DecodeGRRegsRegisterClass(Inst, Op1, Address, Decoder);
623 DecodeGRRegsRegisterClass(Inst, Op1, Address, Decoder);
624 DecodeGRRegsRegisterClass(Inst, Op2, Address, Decoder);
625 DecodeGRRegsRegisterClass(Inst, Op3, Address, Decoder);
631 DecodeL2RUSInstruction(MCInst &Inst, unsigned Insn, uint64_t Address,
637 DecodeGRRegsRegisterClass(Inst, Op1, Address, Decoder);
638 DecodeGRRegsRegisterClass(Inst, Op2, Address, Decoder);
645 DecodeL2RUSBitpInstruction(MCInst &Inst, unsigned Insn, uint64_t Address,
651 DecodeGRRegsRegisterClass(Inst, Op1, Address, Decoder);
652 DecodeGRRegsRegisterClass(Inst, Op2, Address, Decoder);
653 DecodeBitpOperand(Inst, Op3, Address, Decoder);
659 DecodeL6RInstruction(MCInst &Inst, unsigned Insn, uint64_t Address,
669 DecodeGRRegsRegisterClass(Inst, Op1, Address, Decoder);
670 DecodeGRRegsRegisterClass(Inst, Op4, Address, Decoder);
671 DecodeGRRegsRegisterClass(Inst, Op2, Address, Decoder);
672 DecodeGRRegsRegisterClass(Inst, Op3, Address, Decoder);
673 DecodeGRRegsRegisterClass(Inst, Op5, Address, Decoder);
674 DecodeGRRegsRegisterClass(Inst, Op6, Address, Decoder);
679 DecodeL5RInstructionFail(MCInst &Inst, unsigned Insn, uint64_t Address,
687 return DecodeL6RInstruction(Inst, Insn, Address, Decoder);
693 DecodeL5RInstruction(MCInst &Inst, unsigned Insn, uint64_t Address,
699 return DecodeL5RInstructionFail(Inst, Insn, Address, Decoder);
702 return DecodeL5RInstructionFail(Inst, Insn, Address, Decoder);
704 DecodeGRRegsRegisterClass(Inst, Op1, Address, Decoder);
705 DecodeGRRegsRegisterClass(Inst, Op4, Address, Decoder);
706 DecodeGRRegsRegisterClass(Inst, Op2, Address, Decoder);
707 DecodeGRRegsRegisterClass(Inst, Op3, Address, Decoder);
708 DecodeGRRegsRegisterClass(Inst, Op5, Address, Decoder);
713 DecodeL4RSrcDstInstruction(MCInst &Inst, unsigned Insn, uint64_t Address,
720 DecodeGRRegsRegisterClass(Inst, Op1, Address, Decoder);
721 S = DecodeGRRegsRegisterClass(Inst, Op4, Address, Decoder);
724 DecodeGRRegsRegisterClass(Inst, Op4, Address, Decoder);
725 DecodeGRRegsRegisterClass(Inst, Op2, Address, Decoder);
726 DecodeGRRegsRegisterClass(Inst, Op3, Address, Decoder);
732 DecodeL4RSrcDstSrcDstInstruction(MCInst &Inst, unsigned Insn, uint64_t Address,
739 DecodeGRRegsRegisterClass(Inst, Op1, Address, Decoder);
740 S = DecodeGRRegsRegisterClass(Inst, Op4, Address, Decoder);
743 DecodeGRRegsRegisterClass(Inst, Op1, Address, Decoder);
744 DecodeGRRegsRegisterClass(Inst, Op4, Address, Decoder);
745 DecodeGRRegsRegisterClass(Inst, Op2, Address, Decoder);
746 DecodeGRRegsRegisterClass(Inst, Op3, Address, Decoder);
755 uint64_t Address,
760 if (!readInstruction16(Region, Address, Size, insn16)) {
766 Address, this, STI);
774 if (!readInstruction32(Region, Address, Size, insn32)) {
779 Result = decodeInstruction(DecoderTable32, instr, insn32, Address, this, STI);
