Lines Matching full:lo12
17 ; CHECK: ldrb {{w[0-9]+}}, [x[[HIREG]], :lo12:var8]
18 ; CHECK: strb {{w[0-9]+}}, [x[[HIREG]], :lo12:var8]
26 ; CHECK-FAST: ldrb {{w[0-9]+}}, [x[[HIREG]], :lo12:var8]
39 ; CHECK: ldrh {{w[0-9]+}}, [x[[HIREG]], :lo12:var16]
40 ; CHECK: strh {{w[0-9]+}}, [x[[HIREG]], :lo12:var16]
43 ; CHECK-FAST: ldrh {{w[0-9]+}}, [x[[HIREG]], :lo12:var16]
52 ; CHECK: ldr {{w[0-9]+}}, [x[[HIREG]], :lo12:var32]
53 ; CHECK: str {{w[0-9]+}}, [x[[HIREG]], :lo12:var32]
56 ; CHECK-FAST: add {{x[0-9]+}}, x[[HIREG]], :lo12:var32
65 ; CHECK: ldr {{x[0-9]+}}, [x[[HIREG]], :lo12:var64]
66 ; CHECK: str {{x[0-9]+}}, [x[[HIREG]], :lo12:var64]
69 ; CHECK-FAST: add {{x[0-9]+}}, x[[HIREG]], :lo12:var64
76 ; CHECK: add x0, [[HIREG]], :lo12:var64
79 ; CHECK-FAST: add x0, [[HIREG]], :lo12:var64
91 ; CHECK-PIC: ldr {{w[0-9]+}}, [{{x[0-9]+}}, :lo12:hiddenvar]
93 ; CHECK-PIC: ldr {{w[0-9]+}}, [{{x[0-9]+}}, :lo12:protectedvar]
104 ; CHECK: ldr w0, [x[[HIREG]], :lo12:var_default]
113 ; CHECK: add x[[ADDR:[0-9]+]], [[HIREG]], :lo12:var_default
