Lines Matching full:regular
4 ; The REGULAR run just checks that the inputs passed to promote const expose
6 ; RUN: llc < %s -mtriple=arm64-apple-ios7.0 -disable-machine-cse -aarch64-promote-const=false -mcpu=cyclone | FileCheck -check-prefix=REGULAR %s
21 ; REGULAR-LABEL: test1:
22 ; Regular access is quite bad, it performs 4 loads, one for each chunk of
24 ; REGULAR: adrp [[PAGEADDR:x[0-9]+]], [[CSTLABEL:lCP.*]]@PAGE
26 ; REGULAR: ldr q0, {{\[}}[[PAGEADDR]], [[CSTLABEL]]@PAGEOFF]
27 ; REGULAR: adrp [[PAGEADDR:x[0-9]+]], [[CSTLABEL:lCP.*]]@PAGE
28 ; REGULAR: ldr q1, {{\[}}[[PAGEADDR]], [[CSTLABEL]]@PAGEOFF]
29 ; REGULAR: adrp [[PAGEADDR2:x[0-9]+]], [[CSTLABEL2:lCP.*]]@PAGE
30 ; REGULAR: ldr q2, {{\[}}[[PAGEADDR2]], [[CSTLABEL2]]@PAGEOFF]
31 ; REGULAR: adrp [[PAGEADDR3:x[0-9]+]], [[CSTLABEL3:lCP.*]]@PAGE
32 ; REGULAR: ldr q3, {{\[}}[[PAGEADDR3]], [[CSTLABEL3]]@PAGEOFF]
33 ; REGULAR-NEXT: ret
51 ; REGULAR-LABEL: test2:
52 ; Regular access is strickly the same as promoted access.
55 ; REGULAR: adrp [[PAGEADDR:x[0-9]+]], [[CSTLABEL:lCP.*]]@PAGE
56 ; REGULAR: ldr q[[REGNUM:[0-9]+]], {{\[}}[[PAGEADDR]], [[CSTLABEL]]@PAGEOFF]
58 ; REGULAR-NEXT: add.16b v0, v0, v[[REGNUM]]
59 ; REGULAR-NEXT: mla.16b v0, v0, v[[REGNUM]]
60 ; REGULAR-NEXT: ret
90 ; REGULAR-LABEL: test3:
91 ; Regular mode does not elimitate common sub expression by its own.
93 ; REGULAR: adrp [[PAGEADDR:x[0-9]+]], [[CSTLABEL1:lCP.*]]@PAGE
94 ; REGULAR-NEXT: ldr q[[REGNUM:[0-9]+]], {{\[}}[[PAGEADDR]], [[CSTLABEL1]]@PAGEOFF]
96 ; REGULAR-NEXT: add.16b v0, v0, v[[REGNUM]]
97 ; REGULAR-NEXT: cbz w0, [[LABELelse:LBB.*]]
100 ; REGULAR: adrp [[PAGEADDR:x[0-9]+]], [[CSTLABEL1]]@PAGE
101 ; REGULAR-NEXT: ldr q[[REGNUM]], {{\[}}[[PAGEADDR]], [[CSTLABEL1]]@PAGEOFF]
102 ; REGULAR-NEXT: b [[LABELend:LBB.*]]
104 ; REGULAR-NEXT: [[LABELelse]]
105 ; REGULAR-NEXT: adrp [[PAGEADDR:x[0-9]+]], [[CSTLABEL2:lCP.*]]@PAGE
106 ; REGULAR-NEXT: ldr q[[REGNUM]], {{\[}}[[PAGEADDR]], [[CSTLABEL2]]@PAGEOFF]
108 ; REGULAR-NEXT: [[LABELend]]:
109 ; REGULAR-NEXT: mul.16b [[DESTV:v[0-9]+]], v0, v[[REGNUM]]
110 ; REGULAR-NEXT: add.16b v0, v0, [[DESTV]]
111 ; REGULAR-NEXT: ret
151 ; REGULAR-LABEL: test4:
152 ; REGULAR: adrp [[PAGEADDR:x[0-9]+]], [[CSTLABEL3:lCP.*]]@PAGE
153 ; REGULAR-NEXT: ldr q[[REGNUM:[0-9]+]], {{\[}}[[PAGEADDR]], [[CSTLABEL3]]@PAGEOFF]
155 ; REGULAR-NEXT: add.16b v0, v0, v[[REGNUM]]
156 ; REGULAR-NEXT: cbz w0, [[LABEL:LBB.*]]
159 ; REGULAR: adrp [[PAGEADDR:x[0-9]+]], [[CSTLABEL3]]@PAGE
160 ; REGULAR-NEXT: ldr q[[REGNUM:[0-9]+]], {{\[}}[[PAGEADDR]], [[CSTLABEL3]]@PAGEOFF]
162 ; REGULAR-NEXT: mul.16b v0, v0, v[[REGNUM]]
164 ; REGULAR-NEXT: [[LABEL]]:
165 ; REGULAR-NEXT: ret
202 ; REGULAR-LABEL: test5:
203 ; REGULAR: cbz w0, [[LABELelse:LBB.*]]
205 ; REGULAR: adrp [[PAGEADDR:x[0-9]+]], [[CSTLABEL:lCP.*]]@PAGE
206 ; REGULAR-NEXT: ldr q[[REGNUM:[0-9]+]], {{\[}}[[PAGEADDR]], [[CSTLABEL]]@PAGEOFF]
207 ; REGULAR-NEXT: add.16b [[DESTV:v[0-9]+]], v0, v[[REGNUM]]
208 ; REGULAR-NEXT: mul.16b v[[DESTREGNUM:[0-9]+]], [[DESTV]], v[[REGNUM]]
209 ; REGULAR-NEXT: b [[LABELend:LBB.*]]
211 ; REGULAR-NEXT: [[LABELelse]]
212 ; REGULAR-NEXT: adrp [[PAGEADDR:x[0-9]+]], [[CSTLABEL:lCP.*]]@PAGE
213 ; REGULAR-NEXT: ldr q[[DESTREGNUM]], {{\[}}[[PAGEADDR]], [[CSTLABEL]]@PAGEOFF]
215 ; REGULAR-NEXT: [[LABELend]]:
216 ; REGULAR-NEXT: mul.16b [[TMP1:v[0-9]+]], v[[DESTREGNUM]], v[[DESTREGNUM]]
217 ; REGULAR-NEXT: mul.16b [[TMP2:v[0-9]+]], [[TMP1]], [[TMP1]]
218 ; REGULAR-NEXT: mul.16b [[TMP3:v[0-9]+]], [[TMP2]], [[TMP2]]
219 ; REGULAR-NEXT: mul.16b v0, [[TMP3]], [[TMP3]]
220 ; REGULAR-NEXT: ret
