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Lines Matching full:lo12

27 ; CHECK-DAG: ldrb w0, [{{x[0-9]+}}, {{#?}}:lo12:var8]
28 ; CHECK-DAG: ldrb w1, [{{x[0-9]+}}, {{#?}}:lo12:var8_2]
34 ; CHECK-DAG: ldr s1, [{{x[0-9]+}}, {{#?}}:lo12:varfloat_2]
35 ; CHECK-DAG: ldr s0, [{{x[0-9]+}}, {{#?}}:lo12:varfloat]
54 ; CHECK: str w0, [{{x[0-9]+}}, {{#?}}:lo12:var32]
59 ; CHECK: str d0, [{{x[0-9]+}}, {{#?}}:lo12:vardouble]
66 ; CHECK: str x0, [{{x[0-9]+}}, {{#?}}:lo12:varsmallstruct]
69 ; CHECK: add x8, {{x[0-9]+}}, {{#?}}:lo12:varstruct
131 ; CHECK: ldr [[I128LO:x[0-9]+]], [{{x[0-9]+}}, {{#?}}:lo12:var128]
135 ; CHECK-NONEON: ldr [[I128LO:x[0-9]+]], [{{x[0-9]+}}, :lo12:var128]
157 ; CHECK: ldr [[FPTR:x[0-9]+]], [{{x[0-9]+}}, {{#?}}:lo12:fptr]