Lines Matching refs:fp
20 struct nv30_fragprog *fp;
80 struct nv30_fragprog *fp = fpc->fp;
82 fp->insn_len += size;
83 fp->insn = realloc(fp->insn, sizeof(uint32_t) * fp->insn_len);
89 struct nv30_fragprog *fp = fpc->fp;
90 uint32_t *hw = &fp->insn[fpc->inst_offset];
108 hw = &fp->insn[fpc->inst_offset];
112 memcpy(&fp->insn[fpc->inst_offset + 4],
121 hw = &fp->insn[fpc->inst_offset];
128 fp->consts = realloc(fp->consts, ++fp->nr_consts *
130 fpd = &fp->consts[fp->nr_consts - 1];
133 memset(&fp->insn[fpd->offset], 0, sizeof(uint32_t) * 4);
162 struct nv30_fragprog *fp = fpc->fp;
163 uint32_t *hw = &fp->insn[fpc->inst_offset];
168 fp->fp_control |= 0x0000000e;
191 struct nv30_fragprog *fp = fpc->fp;
194 fpc->inst_offset = fp->insn_len;
197 hw = &fp->insn[fpc->inst_offset];
201 fp->fp_control |= NV30_3D_FP_CONTROL_USES_KIL;
246 fpc->inst_offset = fpc->fp->insn_len;
248 hw = &fpc->fp->insn[fpc->inst_offset];
270 fpc->inst_offset = fpc->fp->insn_len;
272 hw = &fpc->fp->insn[fpc->inst_offset];
289 fpc->inst_offset = fpc->fp->insn_len;
291 hw = &fpc->fp->insn[fpc->inst_offset];
306 fpc->inst_offset = fpc->fp->insn_len;
308 hw = &fpc->fp->insn[fpc->inst_offset];
333 fpc->inst_offset = fpc->fp->insn_len;
335 hw = &fpc->fp->insn[fpc->inst_offset];
357 fpc->inst_offset = fpc->fp->insn_len;
359 hw = &fpc->fp->insn[fpc->inst_offset];
470 if(fpc->fp->info.input_semantic_name[fsrc->Register.Index] == TGSI_SEMANTIC_FOG && (0
821 hw = &fpc->fp->insn[util_dynarray_top(&fpc->if_stack, unsigned)];
822 hw[2] = NV40_FP_OP_OPCODE_IS_BRANCH | fpc->fp->insn_len;
832 hw = &fpc->fp->insn[util_dynarray_pop(&fpc->if_stack, unsigned)];
834 hw[2] = NV40_FP_OP_OPCODE_IS_BRANCH | fpc->fp->insn_len;
835 hw[3] = fpc->fp->insn_len;
934 fpc->fp->texcoord[fdec->Semantic.Index] = fdec->Semantic.Index;
935 fpc->fp->texcoords |= (1 << fdec->Semantic.Index);
936 fpc->fp
960 if (fpc->fp->texcoord[hw] == 0xffff) {
961 fpc->fp->texcoord[hw] = fdec->Semantic.Index;
963 fpc->fp->texcoords |= (0x1 << hw);
964 fpc->fp->vp_or |= (0x00004000 << hw);
966 fpc->fp->vp_or |= (0x00001000 << (hw - 8));
969 fpc->fp->point_sprite_control |= (0x00000100 << hw);
1023 fpc->r_imm = CALLOC(fpc->fp->info.immediate_count, sizeof(struct nvfx_reg));
1025 tgsi_parse_init(&p, fpc->fp->pipe.tokens);
1061 assert(fpc->nr_imm < fpc->fp->info.immediate_count);
1072 tgsi_parse_init(&p, fpc->fp->pipe.tokens);
1115 _nvfx_fragprog_translate(struct nv30_context *nvfx, struct nv30_fragprog *fp,
1122 fp->translated = FALSE;
1123 fp->point_sprite_control = 0;
1124 fp->vp_or = 0;
1131 fpc->fp = fp;
1133 memset(fp->texcoord, 0xff, sizeof(fp->texcoord));
1135 for (unsigned i = 0; i < fp->info.num_properties; ++i) {
1136 switch (fp->info.properties[i].name) {
1138 if (fp->info.properties[i].data[0])
1139 fp->coord_conventions |= NV30_3D_COORD_CONVENTIONS_ORIGIN_INVERTED;
1142 if (fp->info.properties[i].data[0])
1143 fp->coord_conventions |= NV30_3D_COORD_CONVENTIONS_CENTER_INTEGER;
1146 if (fp->info.properties[i].data[0])
1147 fp->rt_enable |= NV30_3D_RT_ENABLE_MRT;
1157 tgsi_parse_init(&parse, fp->pipe.tokens);
1168 util_dynarray_append(&insns, unsigned, fp->insn_len);
1178 util_dynarray_append(&insns, unsigned, fp->insn_len);
1183 fp->insn[label_reloc->location] |= ((unsigned*)insns.data)[label_reloc->target];
1188 fp->fp_control |= (fpc->num_regs-1)/2;
1190 fp->fp_control |= fpc->num_regs << NV40_3D_FP_CONTROL_TEMP_COUNT__SHIFT;
1193 if(fp->insn)
1194 fp->insn[fpc->inst_offset] |= 0x00000001;
1197 fpc->inst_offset = fp->insn_len;
1199 fp->insn[fpc->inst_offset + 0] = 0x00000001;
1200 fp->insn[fpc->inst_offset + 1] = 0x00000000;
1201 fp->insn[fpc->inst_offset + 2] = 0x00000000;
1202 fp->insn[fpc->inst_offset + 3] = 0x00000000;
1207 tgsi_dump(fp->pipe.tokens, 0);
1210 for (unsigned i = 0; i < fp->insn_len; i += 4)
1211 debug_printf("%3u: %08x %08x %08x %08x\n", i >> 2, fp->insn[i], fp->insn[i + 1], fp->insn[i + 2], fp->insn[i + 3]);
1215 fp->translated = TRUE;
1234 tgsi_dump(fp->pipe.tokens, 0);
