Lines Matching refs:rS
24084 UInt rS = eregOfRexRM(pfx,modrm);
24085 assign( arg32, getIReg32(rS) );
24088 nameIReg32(rS), nameXMMReg(rV), nameXMMReg(rD));
24110 UInt rS = eregOfRexRM(pfx,modrm);
24111 assign( arg64, getIReg64(rS) );
24114 nameIReg64(rS), nameXMMReg(rV), nameXMMReg(rD));
24138 UInt rS = eregOfRexRM(pfx,modrm);
24139 assign( arg64, getIReg64(rS) );
24142 nameIReg64(rS), nameXMMReg(rV), nameXMMReg(rD));
24168 UInt rS = eregOfRexRM(pfx,modrm);
24169 assign( arg32, getIReg32(rS) );
24172 nameIReg32(rS), nameXMMReg(rV), nameXMMReg(rD));
24199 UInt rS = gregOfRexRM(pfx, modrm);
24201 assign(tS, getXMMReg(rS));
24207 nameXMMReg(rS), dis_buf);
24215 UInt rS = gregOfRexRM(pfx, modrm);
24217 assign(tS, getYMMReg(rS));
24223 nameYMMReg(rS), dis_buf);
24625 UInt rS = eregOfRexRM(pfx,modrm);
24626 assign(f64lo, getXMMRegLane64F(rS, 0));
24629 nameXMMReg(rS), nameXMMReg(rV), nameXMMReg(rD));
24653 UInt rS = eregOfRexRM(pfx,modrm);
24654 assign(f32lo, getXMMRegLane32F(rS, 0));
24657 nameXMMReg(rS), nameXMMReg(rV), nameXMMReg(rD));
25202 UInt rS = eregOfRexRM(pfx, modrm);
25204 assign(tD, getYMMReg(rS));
25205 DIP("vmovdq%c %s,%s\n", ch, nameYMMReg(rS), nameYMMReg(rD));
25227 UInt rS = eregOfRexRM(pfx, modrm);
25229 assign(tD, getXMMReg(rS));
25230 DIP("vmovdq%c %s,%s\n", ch, nameXMMReg(rS), nameXMMReg(rD));
25396 Int rS = eregOfRexRM(pfx,getUChar(delta));
25401 DIP("vpsrldq $%d,%s,%s\n", imm, nameXMMReg(rS), nameXMMReg(rD));
25403 assign( vecS, getXMMReg(rS) );
25410 DIP("vpslldq $%d,%s,%s\n", imm, nameXMMReg(rS), nameXMMReg(rD));
25412 assign( vecS, getXMMReg(rS) );
25437 Int rS = eregOfRexRM(pfx,getUChar(delta));
25443 DIP("vpsrldq $%d,%s,%s\n", imm, nameYMMReg(rS), nameYMMReg(rD));
25445 assign( vecS0, getYMMRegLane128(rS, 0));
25446 assign( vecS1, getYMMRegLane128(rS, 1));
25456 DIP("vpslldq $%d,%s,%s\n", imm, nameYMMReg(rS), nameYMMReg(rD));
25458 rS, 0));
25459 assign( vecS1, getYMMRegLane128(rS, 1));
25759 UInt rS = gregOfRexRM(pfx, modrm);
25763 assign(tS, getYMMReg(rS));
25768 DIP("vmovdq%c %s,%s\n", ch, nameYMMReg(rS), nameYMMReg(rD));
25775 DIP("vmovdq%c %s,%s\n", ch, nameYMMReg(rS), dis_buf);
25784 UInt rS = gregOfRexRM(pfx, modrm);
25788 assign(tS, getXMMReg(rS));
25793 DIP("vmovdq%c %s,%s\n", ch, nameXMMReg(rS), nameXMMReg(rD));
25800 DIP("vmovdq%c %s,%s\n", ch, nameXMMReg(rS), dis_buf);
30444 /* VEXTRACTF128 $lane_no, rS, r/m
30445 ::: r/m:V128 = a lane of rS:V256 (RM format) */
30451 UInt rS = gregOfRexRM(pfx, modrm);
30457 assign(t128, getYMMRegLane128(rS, ib & 1));
30460 ib, nameXMMReg(rS), nameYMMReg(rD));
30465 assign(t128, getYMMRegLane128(rS, ib & 1));
30468 ib, nameYMMReg(rS), dis_buf);
30654 /* VEXTRACTI128 $lane_no, rS, r/m
30655 ::: r/m:V128 = a lane of rS:V256 (RM format) */
30661 UInt rS = gregOfRexRM(pfx, modrm);
30667 assign(t128, getYMMRegLane128(rS, ib & 1));
30670 ib, nameXMMReg(rS), nameYMMReg(rD));
30675 assign(t128, getYMMRegLane128(rS, ib & 1));
30678 ib, nameYMMReg(rS), dis_buf);
