Lines Matching defs:shift
722 ... base(%rbp, %tmp, shift) ...
1010 /* Perhaps a shift op? */
1061 /* Now consider the shift amount. If it's a literal, we
1328 Int shift = 0;
1331 case Iop_MullS32: shr_op = Ash_SAR; shift = 32; break;
1332 case Iop_MullS16: shr_op = Ash_SAR; shift = 48; break;
1333 case Iop_MullS8: shr_op = Ash_SAR; shift = 56; break;
1334 case Iop_MullU32: shr_op = Ash_SHR; shift = 32; break;
1335 case Iop_MullU16: shr_op = Ash_SHR; shift = 48; break;
1336 case Iop_MullU8: shr_op = Ash_SHR; shift = 56; break;
1342 addInstr(env, AMD64Instr_Sh64(Ash_SHL, shift, a32));
1343 addInstr(env, AMD64Instr_Sh64(Ash_SHL, shift, b32));
1344 addInstr(env, AMD64Instr_Sh64(shr_op, shift, a32));
1345 addInstr(env, AMD64Instr_Sh64(shr_op, shift, b32));
1513 Int shift = 0;
1515 case Iop_16HIto8: shift = 8; break;
1516 case Iop_32HIto16: shift = 16; break;
1517 case Iop_64HIto32: shift = 32; break;
1521 addInstr(env, AMD64Instr_Sh64(Ash_SHR, shift, dst));
1976 UInt shift = imm8->Iex.Const.con->Ico.U8;
1980 vassert(shift == 0 || shift == 1 || shift == 2 || shift == 3);
1981 return AMD64AMode_IRRS(offset, r1, r2, shift);
1992 UInt shift = e->Iex.Binop.arg2->Iex.Binop.arg2->Iex.Const.con->Ico.U8;
1993 if (shift == 1 || shift == 2 || shift == 3) {
1996 return AMD64AMode_IRRS(0, r1, r2, shift);
