Lines Matching refs:mode64
95 HReg hregPPC_GPR0 ( Bool mode64 ) { return MkHRegGPR( 0, mode64); }
96 HReg hregPPC_GPR1 ( Bool mode64 ) { return MkHRegGPR( 1, mode64); }
97 HReg hregPPC_GPR2 ( Bool mode64 ) { return MkHRegGPR( 2, mode64); }
98 HReg hregPPC_GPR3 ( Bool mode64 ) { return MkHRegGPR( 3, mode64); }
99 HReg hregPPC_GPR4 ( Bool mode64 ) { return MkHRegGPR( 4, mode64); }
100 HReg hregPPC_GPR5 ( Bool mode64 ) { return MkHRegGPR( 5, mode64); }
101 HReg hregPPC_GPR6 ( Bool mode64 ) { return MkHRegGPR( 6, mode64); }
102 HReg hregPPC_GPR7 ( Bool mode64 ) { return MkHRegGPR( 7, mode64); }
103 HReg hregPPC_GPR8 ( Bool mode64 ) { return MkHRegGPR( 8, mode64); }
104 HReg hregPPC_GPR9 ( Bool mode64 ) { return MkHRegGPR( 9, mode64); }
105 HReg hregPPC_GPR10 ( Bool mode64 ) { return MkHRegGPR(10, mode64); }
106 HReg hregPPC_GPR11 ( Bool mode64 ) { return MkHRegGPR(11, mode64); }
107 HReg hregPPC_GPR12 ( Bool mode64 ) { return MkHRegGPR(12, mode64); }
108 HReg hregPPC_GPR13 ( Bool mode64 ) { return MkHRegGPR(13, mode64); }
109 HReg hregPPC_GPR14 ( Bool mode64 ) { return MkHRegGPR(14, mode64); }
110 HReg hregPPC_GPR15 ( Bool mode64 ) { return MkHRegGPR(15, mode64); }
111 HReg hregPPC_GPR16 ( Bool mode64 ) { return MkHRegGPR(16, mode64); }
112 HReg hregPPC_GPR17 ( Bool mode64 ) { return MkHRegGPR(17, mode64); }
113 HReg hregPPC_GPR18 ( Bool mode64 ) { return MkHRegGPR(18, mode64); }
114 HReg hregPPC_GPR19 ( Bool mode64 ) { return MkHRegGPR(19, mode64); }
115 HReg hregPPC_GPR20 ( Bool mode64 ) { return MkHRegGPR(20, mode64); }
116 HReg hregPPC_GPR21 ( Bool mode64 ) { return MkHRegGPR(21, mode64); }
117 HReg hregPPC_GPR22 ( Bool mode64 ) { return MkHRegGPR(22, mode64); }
118 HReg hregPPC_GPR23 ( Bool mode64 ) { return MkHRegGPR(23, mode64); }
119 HReg hregPPC_GPR24 ( Bool mode64 ) { return MkHRegGPR(24, mode64); }
120 HReg hregPPC_GPR25 ( Bool mode64 ) { return MkHRegGPR(25, mode64); }
121 HReg hregPPC_GPR26 ( Bool mode64 ) { return MkHRegGPR(26, mode64); }
122 HReg hregPPC_GPR27 ( Bool mode64 ) { return MkHRegGPR(27, mode64); }
123 HReg hregPPC_GPR28 ( Bool mode64 ) { return MkHRegGPR(28, mode64); }
124 HReg hregPPC_GPR29 ( Bool mode64 ) { return MkHRegGPR(29, mode64); }
125 HReg hregPPC_GPR30 ( Bool mode64 ) { return MkHRegGPR(30, mode64); }
126 HReg hregPPC_GPR31 ( Bool mode64 ) { return MkHRegGPR(31, mode64); }
196 void getAllocableRegs_PPC ( Int* nregs, HReg** arr, Bool mode64 )
199 if (mode64)
207 (*arr)[i++] = hregPPC_GPR3(mode64);
208 (*arr)[i++] = hregPPC_GPR4(mode64);
209 (*arr)[i++] = hregPPC_GPR5(mode64);
210 (*arr)[i++] = hregPPC_GPR6(mode64);
211 (*arr)[i++] = hregPPC_GPR7(mode64);
212 (*arr)[i++] = hregPPC_GPR8(mode64);
213 (*arr)[i++] = hregPPC_GPR9(mode64);
214 (*arr)[i++] = hregPPC_GPR10(mode64);
215 if (!mode64) {
216 /* in mode64:
219 (*arr)[i++] = hregPPC_GPR11(mode64);
220 (*arr)[i++] = hregPPC_GPR12(mode64);
224 (*arr)[i++] = hregPPC_GPR14(mode64);
225 (*arr)[i++] = hregPPC_GPR15(mode64);
226 (*arr)[i++] = hregPPC_GPR16(mode64);
227 (*arr)[i++] = hregPPC_GPR17(mode64);
228 (*arr)[i++] = hregPPC_GPR18(mode64);
229 (*arr)[i++] = hregPPC_GPR19(mode64);
230 (*arr)[i++] = hregPPC_GPR20(mode64);
231 (*arr)[i++] = hregPPC_GPR21(mode64);
232 (*arr)[i++] = hregPPC_GPR22(mode64);
233 (*arr)[i++] = hregPPC_GPR23(mode64);
234 (*arr)[i++] = hregPPC_GPR24(mode64);
235 (*arr)[i++] = hregPPC_GPR25(mode64);
236 (*arr)[i++] = hregPPC_GPR26(mode64);
237 (*arr)[i++] = hregPPC_GPR27(mode64);
238 (*arr)[i++] = hregPPC_GPR28(mode64);
783 PPCInstr* PPCInstr_LI ( HReg dst, ULong imm64, Bool mode64 )
789 if (!mode64)
926 HReg dst, PPCAMode* src, Bool mode64 ) {
933 if (sz == 8) vassert(mode64);
937 HReg dst, HReg src, Bool mode64 )
945 if (sz == 8) vassert(mode64);
949 Bool mode64 ) {
956 if (sz == 8) vassert(mode64);
959 mode64 ) {
966 if (sz == 8) vassert(mode64);
1504 static void ppLoadImm ( HReg dst, ULong imm, Bool mode64 ) {
1507 if (!mode64) {
1523 void ppPPCInstr ( PPCInstr* i, Bool mode64 )
1527 ppLoadImm(i->Pin.LI.dst, i->Pin.LI.imm64, mode64);
1630 ppLoadImm(hregPPC_GPR10(mode64), i->Pin.Call.target, mode64);
1648 if (mode64) {
1657 if (mode64) {
1670 vex_printf("%s ", mode64 ? "std" : "stw");
1675 vex_printf("imm%s r30,$disp_cp_xindir; ", mode64 ? "64" : "32");
1682 vex_printf("%s ", mode64 ? "std" : "stw");
1689 vex_printf("imm%s r30,$disp_cp_xindir; ", mode64 ? "64" : "32");
1703 ppLoadImm(i->Pin.CMov.dst, i->Pin.CMov.src->Pri.Imm, mode64);
1910 ppLoadImm(hregPPC_GPR30(mode64),
1911 i->Pin.AvLdSt.addr->Pam.IR.index, mode64);
2251 if (mode64) {
2268 void getRegUsage_PPCInstr ( HRegUsage* u, PPCInstr* i, Bool mode64 )
2315 mode64: r3 to r10
2321 addHRegUse(u, HRmWrite, hregPPC_GPR3(mode64));
2322 addHRegUse(u, HRmWrite, hregPPC_GPR4(mode64));
2323 addHRegUse(u, HRmWrite, hregPPC_GPR5(mode64));
2324 addHRegUse(u, HRmWrite, hregPPC_GPR6(mode64));
2325 addHRegUse(u, HRmWrite, hregPPC_GPR7(mode64));
2326 addHRegUse(u, HRmWrite, hregPPC_GPR8(mode64));
2327 addHRegUse(u, HRmWrite, hregPPC_GPR9(mode64));
2328 addHRegUse(u, HRmWrite, hregPPC_GPR10(mode64));
2329 if (!mode64) {
2330 addHRegUse(u, HRmWrite, hregPPC_GPR11(mode64));
2331 addHRegUse(u, HRmWrite, hregPPC_GPR12(mode64));
2337 if (argir &(1<<10)) addHRegUse(u, HRmRead, hregPPC_GPR10(mode64));
2338 if (argir & (1<<9)) addHRegUse(u, HRmRead, hregPPC_GPR9(mode64));
2339 if (argir & (1<<8)) addHRegUse(u, HRmRead, hregPPC_GPR8(mode64));
2340 if (argir & (1<<7)) addHRegUse(u, HRmRead, hregPPC_GPR7(mode64));
2341 if (argir & (1<<6)) addHRegUse(u, HRmRead, hregPPC_GPR6(mode64));
2342 if (argir & (1<<5)) addHRegUse(u, HRmRead, hregPPC_GPR5(mode64));
2343 if (argir & (1<<4)) addHRegUse(u, HRmRead, hregPPC_GPR4(mode64));
2344 if (argir & (1<<3)) addHRegUse(u, HRmRead, hregPPC_GPR3(mode64));
2353 addHRegUse(u, HRmWrite, hregPPC_GPR10(mode64));
2457 addHRegUse(u, HRmWrite, hregPPC_GPR30(mode64));
2651 addHRegUse(u, HRmWrite, hregPPC_GPR30(mode64)); /* also unavail to RA */
2654 addHRegUse(u, HRmWrite, hregPPC_GPR29(mode64));
2655 addHRegUse(u, HRmWrite, hregPPC_GPR30(mode64));
2658 ppPPCInstr(i, mode64);
2669 void mapRegs_PPCInstr ( HRegRemap* m, PPCInstr* i, Bool mode64 )
2986 ppPPCInstr(i, mode64);
3027 HReg rreg, Int offsetB, Bool mode64 )
3032 am = PPCAMode_IR( offsetB, GuestStatePtr(mode64) );
3035 vassert(mode64);
3036 *i1 = PPCInstr_Store( 8, am, rreg, mode64 );
3039 vassert(!mode64);
3040 *i1 = PPCInstr_Store( 4, am, rreg, mode64 );
3057 HReg rreg, Int offsetB, Bool mode64 )
3062 am = PPCAMode_IR( offsetB, GuestStatePtr(mode64) );
3065 vassert(mode64);
3066 *i1 = PPCInstr_Load( 8, rreg, am, mode64 );
3069 vassert(!mode64);
3070 *i1 = PPCInstr_Load( 4, rreg, am, mode64 );
3088 static UInt iregNo ( HReg r, Bool mode64 )
3091 vassert(hregClass(r) == mode64 ? HRcInt64 : HRcInt32);
3362 PPCAMode* am, Bool mode64 )
3368 rA = iregNo(am->Pam.IR.base, mode64);
3371 if (opc1 == 58 || opc1 == 62) { // ld/std: mode64 only
3372 vassert(mode64);
3382 UInt rSD, PPCAMode* am, Bool mode64 )
3387 rA = iregNo(am->Pam.RR.base, mode64);
3388 rB = iregNo(am->Pam.RR.index, mode64);
3396 static UChar* mkLoadImm ( UChar* p, UInt r_dst, ULong imm, Bool mode64 )
3400 if (!mode64) {
3425 vassert(mode64);
3458 UInt r_dst, ULong imm, Bool mode64 )
3462 if (!mode64) {
3471 if (!mode64) {
3503 UInt r_dst, ULong imm, Bool mode64 )
3507 if (!mode64) {
3516 if (!mode64) {
3565 UInt reg, PPCAMode* am, Bool mode64 )
3568 UInt opc1, sz = mode64 ? 8 : 4;
3571 if (mode64) {
3575 case 4: opc1 = 32; vassert(!mode64); break;
3576 case 8: opc1 = 58; vassert(mode64); break;
3579 p = doAMode_IR(p, opc1, reg, am, mode64);
3589 UInt opc1, sz = mode64 ? 8 : 4;
3592 if (mode64) {
3596 case 4: opc1 = 36; vassert(!mode64); break;
3597 case 8: opc1 = 62; vassert(mode64); break;
3600 p = doAMode_IR(p, opc1, reg, am, mode64);
3617 UInt reg, PPCAMode* am, Bool mode64 )
3623 if (mode64) {
3627 p = doAMode_IR(p, opc1, reg, am, mode64);
3640 if (mode64) {
3644 p = doAMode_IR(p, opc1, reg, am, mode64);
3723 Bool mode64,
3733 vex_printf("asm ");ppPPCInstr(i, mode64); vex_printf("\n");
3739 p = mkLoadImm(p, iregNo(i->Pin.LI.dst, mode64),
3740 i->Pin.LI.imm64, mode64);
3746 UInt r_dst = iregNo(i->Pin.Alu.dst, mode64);
3747 UInt r_srcL = iregNo(i->Pin.Alu.srcL, mode64);
3749 iregNo(srcR->Prh.Reg.reg, mode64);
3819 UInt r_dst = iregNo(i->Pin.Shft.dst, mode64);
3820 UInt r_srcL = iregNo(i->Pin.Shft.srcL, mode64);
3822 iregNo(srcR->Prh.Reg.reg, mode64);
3823 if (!mode64)
3900 if (mode64)
3932 UInt r_srcL = iregNo(i->Pin.AddSubC.srcL, mode64);
3933 UInt r_srcR = iregNo(i->Pin.AddSubC.srcR, mode64);
3934 UInt r_dst = iregNo(i->Pin.AddSubC.dst, mode64);
3955 UInt r_srcL = iregNo(i->Pin.Cmp.srcL, mode64);
3959 if (!mode64) // cmp double word invalid for mode32
3961 else if (!sz32) // mode64 && cmp64: set L=1
3976 r_srcR = iregNo(srcR->Prh.Reg.reg, mode64);
3989 UInt r_dst = iregNo(i->Pin.Unary.dst, mode64);
3990 UInt r_src = iregNo(i->Pin.Unary.src, mode64);
4003 vassert(mode64);
4007 vassert(mode64);
4018 UInt r_dst = iregNo(i->Pin.MulL.dst, mode64);
4019 UInt r_srcL = iregNo(i->Pin.MulL.srcL, mode64);
4020 UInt r_srcR = iregNo(i->Pin.MulL.srcR, mode64);
4022 if (!mode64)
4052 UInt r_dst = iregNo(i->Pin.Div.dst, mode64);
4053 UInt r_srcL = iregNo(i->Pin.Div.srcL, mode64);
4054 UInt r_srcR = iregNo(i->Pin.Div.srcR, mode64);
4056 if (!mode64)
4116 p = mkLoadImm(p, r_dst, i->Pin.Call.target, mode64);
4158 if (!mode64) vassert(0 == (((ULong)i->Pin.XDirect.dstGA) >> 32));
4159 p = mkLoadImm(p, /*r*/30, (ULong)i->Pin.XDirect.dstGA, mode64);
4163 /*r*/30, i->Pin.XDirect.amCIA, mode64
4176 p, /*r*/30, Ptr_to_ULong(disp_cp_chain_me), mode64);
4219 iregNo(i->Pin.XIndir.dstGA, mode64),
4220 i->Pin.XIndir.amCIA, mode64
4224 p = mkLoadImm(p, /*r*/30, (ULong)Ptr_to_ULong(disp_cp_xindir), mode64);
4258 iregNo(i->Pin.XIndir.dstGA, mode64),
4259 i->Pin.XIndir.amCIA, mode64
4288 p = mkLoadImm(p, /*r*/31, trcval, mode64);
4292 (ULong)Ptr_to_ULong(disp_cp_xassisted), mode64);
4315 r_dst = iregNo(i->Pin.CMov.dst, mode64);
4331 p = mkLoadImm(p, r_dst, imm_src, mode64); // p += 4|8|20
4334 r_src = iregNo(i->Pin.CMov.src->Pri.Reg, mode64);
4353 UInt r_dst = iregNo(i->Pin.Load.dst, mode64);
4357 if (mode64 && (sz == 4 || sz == 8)) {
4365 case 8: opc1 = 58; vassert(mode64); break;
4368 p = doAMode_IR(p, opc1, r_dst, am_addr, mode64);
4375 case 8: opc2 = 21; vassert(mode64); break;
4378 p = doAMode_RR(p, 31, opc2, r_dst, am_addr, mode64);
4387 p = mkFormX(p, 31, iregNo(i->Pin.LoadL.dst, mode64),
4388 0, iregNo(i->Pin.LoadL.src, mode64), 20, 0);
4391 if (i->Pin.LoadL.sz == 8 && mode64) {
4392 p = mkFormX(p, 31, iregNo(i->Pin.LoadL.dst, mode64),
4393 0, iregNo(i->Pin.LoadL.src, mode64), 84, 0);
4402 UInt r_dst = iregNo(i->Pin.Set.dst, mode64);
4431 p = mkFormX(p, 31, iregNo(i->Pin.MfCR.dst, mode64), 0, 0, 19, 0);
4443 UInt r_src = iregNo(i->Pin.Store.src, mode64);
4447 if (mode64 && (sz == 4 || sz == 8)) {
4455 case 8: vassert(mode64);
4460 p = doAMode_IR(p, opc1, r_src, am_addr, mode64);
4467 case 8: vassert(mode64);
4472 p = doAMode_RR(p, 31, opc2, r_src, am_addr, mode64);
4482 p = mkFormX(p, 31, iregNo(i->Pin.StoreC.src, mode64),
4483 0, iregNo(i->Pin.StoreC.dst, mode64), 150, 1);
4486 if (i->Pin.StoreC.sz == 8 && mode64) {
4487 p = mkFormX(p, 31, iregNo(i->Pin.StoreC.src, mode64),
4488 0, iregNo(i->Pin.StoreC.dst, mode64), 214, 1);
4604 p = doAMode_RR(p, 31, opc, f_reg, am_addr, mode64);
4607 p = doAMode_IR(p, opc, f_reg, am_addr, mode64);
4612 p = doAMode_RR(p, 31, opc, f_reg, am_addr, mode64);
4615 p = doAMode_IR(p, opc, f_reg, am_addr, mode64);
4622 UInt ir_addr = iregNo(i->Pin.FpSTFIW.addr, mode64);
4709 UInt r_dst = iregNo(i->Pin.FpCmp.dst, mode64);
4726 UInt reg = iregNo(i->Pin.RdWrLR.gpr, mode64);
4741 r_base = iregNo(i->Pin.AvLdSt.addr->Pam.RR.base, mode64);
4747 i->Pin.AvLdSt.addr->Pam.IR.index, mode64);
4749 r_idx = iregNo(i->Pin.AvLdSt.addr->Pam.RR.index, mode64);
5632 UInt r_dst = iregNo(i->Pin.Dfp64Cmp.dst, mode64);
5650 UInt r_dst = iregNo(i->Pin.Dfp128Cmp.dst, mode64);
5692 i->Pin.EvCheck.amCounter, mode64);
5697 i->Pin.EvCheck.amCounter, mode64);
5702 i->Pin.EvCheck.amFailAddr, mode64);
5734 if (mode64) {
5736 p, /*r*/30, 0x6555655565556555ULL, True/*mode64*/);
5742 p, /*r*/30, 0x65556555ULL, False/*!mode64*/);
5762 ppPPCInstr(i, mode64);
5786 Bool mode64 )
5801 mode64));
5802 vassert(fetch32(p + (mode64 ? 20 : 8) + 0) == 0x7FC903A6);
5803 vassert(fetch32(p + (mode64 ? 20 : 8) + 4) == 0x4E800421);
5815 Ptr_to_ULong(place_to_jump_to), mode64);
5820 vassert(len == (mode64 ? 28 : 16)); /* stay sane */
5831 Bool mode64 )
5846 mode64));
5847 vassert(fetch32(p + (mode64 ? 20 : 8) + 0) == 0x7FC903A6);
5848 vassert(fetch32(p + (mode64 ? 20 : 8) + 4) == 0x4E800420);
5860 Ptr_to_ULong(disp_cp_chain_me), mode64);
5865 vassert(len == (mode64 ? 28 : 16)); /* stay sane */
5875 Bool mode64 )
5881 if (mode64) {
5883 0x6555655565556555ULL, True/*mode64*/));
5889 True/*mode64*/);
5894 0x65556555ULL, False/*!mode64*/));
5903 False/*!mode64*/);
