Lines Matching refs:Addr
105 XE_Heap, // h: mismatched ptr/addr segments on load/store
125 Addr addr;
132 Addr addr;
147 Addr lo;
148 Addr hi;
158 Addr addr, SSizeT sszB,
164 xe.XE.SorG.addr = addr;
178 void h_record_heap_error( Addr a, SizeT size, Seg* vseg, Bool is_write )
184 xe.XE.Heap.addr = a;
204 Addr lo, Addr hi, Seg* seglo, Seg* seghi )
214 VG_(maybe_record_error)( tid, XE_SysParam, /*a*/(Addr)0, /*str*/s,
236 return //xe1->XE.SorG.addr == xe2->XE.SorG.addr
328 xe->XE.SorG.addr );
341 emit( " Address %#lx expected vs actual:\n", xe->XE.SorG.addr );
352 Addr a = xe->XE.Heap.addr;
444 (ULong)xe->XE.Heap.addr,
459 (ULong)xe->XE.Heap.addr,
543 Addr lo = xe->XE.SysParam.lo;
544 Addr hi = xe->XE.SysParam.hi;
680 xe->XE.Heap.addr );
703 xe->XE.Heap.addr, &xe->XE.Heap.datasym[0],
