Lines Matching full:llvm
37 #include "llvm/IR/IRPrintingPasses.h"
39 #include "llvm/Bitcode/ReaderWriter.h"
41 #include "llvm/CodeGen/RegAllocRegistry.h"
42 #include "llvm/CodeGen/SchedulerRegistry.h"
44 #include "llvm/IR/LLVMContext.h"
45 #include "llvm/IR/Module.h"
46 #include "llvm/IR/Metadata.h"
48 #include "llvm/Transforms/IPO/PassManagerBuilder.h"
50 #include "llvm/IR/DataLayout.h"
51 #include "llvm/Target/TargetMachine.h"
52 #include "llvm/Target/TargetOptions.h"
53 #include "llvm/Support/TargetRegistry.h"
55 #include "llvm/MC/SubtargetFeature.h"
67 mPerFunctionPasses = new llvm::FunctionPassManager(mpModule);
68 mPerFunctionPasses->add(new llvm::DataLayoutPass(mpModule));
70 llvm::PassManagerBuilder PMBuilder;
78 mPerModulePasses = new llvm::PassManager();
79 mPerModulePasses->add(new llvm::DataLayoutPass(mpModule));
81 llvm::PassManagerBuilder PMBuilder;
110 mCodeGenPasses = new llvm::FunctionPassManager(mpModule);
111 mCodeGenPasses->add(new llvm::DataLayoutPass(mpModule));
118 const llvm::Target* TargetInfo =
119 llvm::TargetRegistry::lookupTarget(Triple, Error);
126 llvm::TargetOptions Options;
135 // Options.FloatABIType = llvm::FloatABI::Soft;
137 Options.FloatABIType = llvm::FloatABI::Hard;
142 llvm::Reloc::Model RM = llvm::Reloc::Static;
146 llvm::CodeModel::Model CM;
148 CM = llvm::CodeModel::Small;
152 CM = llvm::CodeModel::Medium;
158 llvm::SubtargetFeatures Features;
169 llvm::TargetMachine *TM =
174 llvm::RegisterScheduler::setDefault(llvm::createDefaultScheduler);
179 llvm::RegisterRegAlloc::setDefault((mCodeGenOpts.OptimizationLevel == 0) ?
180 llvm::createFastRegisterAllocator :
181 llvm::createGreedyRegisterAllocator);
183 llvm::CodeGenOpt::Level OptLevel = llvm::CodeGenOpt::Default;
185 OptLevel = llvm::CodeGenOpt::None;
187 OptLevel = llvm::CodeGenOpt::Aggressive;
190 llvm::TargetMachine::CodeGenFileType CGFT =
191 llvm::TargetMachine::CGFT_AssemblyFile;
193 CGFT = llvm::TargetMachine::CGFT_ObjectFile;
208 llvm::raw_ostream *OS,
219 mLLVMContext(llvm::getGlobalContext()),
224 llvm::formatted_raw_ostream::PRESERVE_STREAM);
236 void Backend::WrapBitcode(llvm::raw_string_ostream &Bitcode) {
260 // Here, we complete a translation unit (whole translation unit is now in LLVM
261 // IR). Now, interact with LLVM backend to generate actual machine code (asm
268 llvm::Module *M = mGen->ReleaseModule();
276 "Unexpected module change during LLVM IR generation");
280 llvm::NamedMDNode *PragmaMetadata =
285 llvm::SmallVector<llvm::Value*, 2> Pragma;
287 Pragma.push_back(llvm::MDString::get(mLLVMContext, I->first));
289 Pragma.push_back(llvm::MDString::get(mLLVMContext, I->second));
293 llvm::MDNode::get(mLLVMContext, Pragma));
306 for (llvm::Module::iterator I = mpModule->begin(), E = mpModule->end();
328 for (llvm::Module::iterator I = mpModule->begin(), E = mpModule->end();
338 llvm::PassManager *LLEmitPM = new llvm::PassManager();
339 LLEmitPM->add(llvm::createPrintModulePass(FormattedOutStream));
344 llvm::PassManager *BCEmitPM = new llvm::PassManager();
346 llvm::raw_string_ostream Bitcode(BCStr);
352 // Pre-ICS targets must use the LLVM 2.9 BitcodeWriter
358 // ICS targets must use the LLVM 2.9_func BitcodeWriter
369 // LLVM's included BitcodeWriter at all (for now).
371 //BCEmitPM->add(llvm::createBitcodeWriterPass(Bitcode));
