Lines Matching defs:shift
374 uint32_t shift;
380 shift = mAddrMode.reg_imm_type;
386 shift = 0;
398 case opADD: *mPC++ = A64_ADD_W(Rd, Rn, Rm, shift, amount); break;
399 case opAND: *mPC++ = A64_AND_W(Rd, Rn, Rm, shift, amount); break;
400 case opORR: *mPC++ = A64_ORR_W(Rd, Rn, Rm, shift, amount); break;
401 case opMVN: *mPC++ = A64_ORN_W(Rd, Rn, Rm, shift, amount); break;
402 case opSUB: *mPC++ = A64_SUB_W(Rd, Rn, Rm, shift, amount, s);break;
885 uint32_t ArmToArm64Assembler::reg_imm(int Rm, int type, uint32_t shift)
889 mAddrMode.reg_imm_shift = shift;
926 uint32_t shift, int W)
928 if(type != 0 || shift != 0 || W != 0)
940 uint32_t ArmToArm64Assembler::reg_scale_post(int /*Rm*/, int /*type*/, uint32_t /*shift*/)
1074 uint32_t Rm, uint32_t shift,
1078 Rd, Rn, Rm, shift_codes[shift], amount);
1079 return ((0x8B << 24) | (shift << 22) | ( Rm << 16) |
1083 uint32_t imm, uint32_t shift)
1085 LOG_INSTR("ADD X%d, X%d, #%d, LSL #%d\n", Rd, Rn, imm, shift);
1086 return (0x91 << 24) | ((shift/12) << 22) | (imm << 10) | (Rn << 5) | Rd;
1090 shift)
1092 LOG_INSTR("SUB X%d, X%d, #%d, LSL #%d\n", Rd, Rn, imm, shift);
1093 return (0xD1 << 24) | ((shift/12) << 22) | (imm << 10) | (Rn << 5) | Rd;
1097 uint32_t Rm, uint32_t shift,
1101 Rd, Rn, Rm, shift_codes[shift], amount);
1102 return ((0x0B << 24) | (shift << 22) | ( Rm << 16) |
1107 uint32_t Rm, uint32_t shift,
1114 Rd, Rn, Rm, shift_codes[shift], amount);
1115 return ((0x4B << 24) | (shift << 22) | ( Rm << 16) |
1121 Rd, Rn, Rm, shift_codes[shift], amount);
1122 return ((0x6B << 24) | (shift << 22) | ( Rm << 16) |
1128 uint32_t Rm, uint32_t shift,
1132 Rd, Rn, Rm, shift_codes[shift], amount);
1133 return ((0x0A << 24) | (shift << 22) | ( Rm << 16) |
1138 uint32_t Rm, uint32_t shift,
1142 Rd, Rn, Rm, shift_codes[shift], amount);
1143 return ((0x2A << 24) | (shift << 22) | ( Rm << 16) |
1148 uint32_t Rm, uint32_t shift,
1152 Rd, Rn, Rm, shift_codes[shift], amount);
1153 return ((0x2A << 24) | (shift << 22) | (0x1 << 21) | ( Rm << 16) |
1178 uint32_t shift)
1180 LOG_INSTR("MOVZ X%d, #0x%x, LSL #%d\n", Rd, imm, shift);
1181 return(0xD2 << 24) | (0x1 << 23) | ((shift/16) << 21) | (imm << 5) | Rd;
1185 uint32_t shift)
1187 LOG_INSTR("MOVK W%d, #0x%x, LSL #%d\n", Rd, imm, shift);
1188 return (0x72 << 24) | (0x1 << 23) | ((shift/16) << 21) | (imm << 5) | Rd;
1192 uint32_t shift)
1194 LOG_INSTR("MOVZ W%d, #0x%x, LSL #%d\n", Rd, imm, shift);
1195 return(0x52 << 24) | (0x1 << 23) | ((shift/16) << 21) | (imm << 5) | Rd;
