| /external/stressapptest/src/ |
| disk_blocks.cc | 61 int64 DiskBlockTable::NumElems() {
|
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| LegalizeTypesGeneric.cpp | 99 unsigned NumElems = 2;
101 EVT NVT = EVT::getVectorVT(*DAG.getContext(), ElemVT, NumElems);
109 NumElems *= 2;
111 NVT = EVT::getVectorVT(*DAG.getContext(), ElemVT, NumElems);
118 for (unsigned i = 0; i < NumElems; ++i)
|
| LegalizeVectorOps.cpp | [all...] |
| LegalizeIntegerTypes.cpp | [all...] |
| SelectionDAG.cpp | 209 unsigned NumElems = N->getNumOperands();
210 if (NumElems == 1)
212 for (unsigned i = 1; i < NumElems; ++i) {
[all...] |
| DAGCombiner.cpp | [all...] |
| /external/llvm/lib/Transforms/Scalar/ |
| Scalarizer.cpp | 368 unsigned NumElems = VT->getNumElements();
372 assert(Op0.size() == NumElems && "Mismatched binary operation");
373 assert(Op1.size() == NumElems && "Mismatched binary operation");
375 Res.resize(NumElems);
376 for (unsigned Elem = 0; Elem < NumElems; ++Elem)
388 unsigned NumElems = VT->getNumElements();
392 assert(Op1.size() == NumElems && "Mismatched select");
393 assert(Op2.size() == NumElems && "Mismatched select");
395 Res.resize(NumElems);
399 assert(Op0.size() == NumElems && "Mismatched select")
[all...] |
| /external/llvm/lib/IR/ |
| ConstantFold.cpp | 347 unsigned NumElems = STy->getNumElements();
349 if (NumElems == 0)
355 for (unsigned i = 1; i != NumElems; ++i)
362 Constant *N = ConstantInt::get(DestTy, NumElems);
415 unsigned NumElems = STy->getNumElements();
417 if (NumElems == 0)
423 for (unsigned i = 1; i != NumElems; ++i)
473 unsigned NumElems = STy->getNumElements();
475 if (NumElems == 0)
481 for (unsigned i = 1; i != NumElems; ++i
[all...] |
| /external/llvm/utils/TableGen/ |
| CodeGenDAGPatterns.cpp | 561 unsigned NumElems = IVT.getVectorNumElements();
572 if (MVT(VTOperand.TypeVec[i]).getVectorNumElements() >= NumElems) {
585 unsigned NumElems = IVT.getVectorNumElements();
596 if (MVT(TypeVec[i]).getVectorNumElements() <= NumElems) {
[all...] |
| /external/llvm/lib/Target/X86/ |
| X86ISelLowering.cpp | 181 unsigned NumElems, SelectionDAG &DAG,
184 return Insert128BitVector(V, V2, NumElems/2, DAG, dl);
188 unsigned NumElems, SelectionDAG &DAG,
191 return Insert256BitVector(V, V2, NumElems/2, DAG, dl);
[all...] |
| /external/llvm/lib/Target/AArch64/ |
| AArch64ISelLowering.cpp | [all...] |
| /external/llvm/lib/Target/ARM/ |
| ARMISelLowering.cpp | [all...] |
