| /external/llvm/utils/TableGen/ |
| AsmWriterInst.h | 11 // the string into operands, which can be literal strings (the constant bits of
12 // the string), actual operands (i.e., operands from the MachineInstr), and
87 std::vector<AsmWriterOperand> Operands;
103 if (!Operands.empty() &&
104 Operands.back().OperandType == AsmWriterOperand::isLiteralTextOperand)
105 Operands.back().Str.append(Str);
107 Operands.push_back(AsmWriterOperand(Str));
|
| DAGISelMatcher.cpp | 273 for (unsigned i = 0, e = Operands.size(); i != e; ++i)
274 OS << Operands[i] << ' ';
336 M->Operands == Operands && M->HasChain == HasChain &&
343 return (HashString(OpcodeName) << 4) | Operands.size();
|
| DAGISelMatcherOpt.cpp | 142 const SmallVectorImpl<unsigned> &Operands = EN->getOperandList();
144 VTs, Operands,
|
| X86RecognizableInstr.h | 63 /// Inferred from the operands; indicates whether the L bit in the VEX prefix is set
95 /// The operands of the instruction, as listed in the CodeGenInstruction.
96 /// They are not one-to-one with operands listed in the MCInst; for example,
97 /// memory operands expand to 5 operands in the MCInst
98 const std::vector<CGIOperandList::OperandInfo>* Operands;
116 /// prefix. If it does, 32-bit register operands stay
131 /// If it is not, then 16-bit immediate operands stay 16-bit.
137 /// handles operands that are in the REG field of the ModR/M byte.
142 /// handles operands that are in the REG field of the ModR/M byte
[all...] |
| InstrInfoEmitter.cpp | 64 std::map<std::string, unsigned> &Operands,
91 for (auto &Op : Inst.Operands) {
92 // Handle aggregate operands and normal operands the same way by expanding
93 // either case into a list of operands for this op.
97 // registers in their multi-operand operands. It may also be an anonymous
135 // Predicate operands. Check to see if the original unexpanded operand
140 // Optional def operands. Check to see if the original unexpanded operand
196 /// \param Operands [out] A map used to generate the OpName enum with operand
204 std::map<std::string, unsigned> &Operands,
[all...] |
| CodeGenInstruction.h | 73 /// PrinterMethodName - The method used to print operands of this type in
86 /// operands correspond to multiple MachineInstr operands. In the X86
92 unsigned MINumOperands; // The number of operands.
100 /// up of multiple MI operands.
130 /// NumDefs - Number of def operands declared, this is the number of
135 /// OperandList - The list of declared operands, along with their declared
172 /// to operands with suboperands are allowed, otherwise not.
215 /// Operands - This is information about the (ins) and (outs) list specified
217 CGIOperandList Operands;
[all...] |
| FixedLenDecoderEmitter.cpp | 315 const std::map<unsigned, std::vector<OperandInfo> > &Operands;
339 Operands(FC.Operands), Filters(FC.Filters),
349 : AllInstructions(Insts), Opcodes(IDs), Operands(Ops), Filters(),
362 : AllInstructions(Insts), Opcodes(IDs), Operands(Ops),
568 Owner->Operands,
601 Owner->Operands,
[all...] |
| AsmMatcherEmitter.cpp | 11 // assembly operands in the MCInst structures. It also emits a matcher for
14 // Converting assembly operands into MCInst structures
18 // operands. The target specific parser should generally eliminate any syntax
22 // operands.
59 // arbitrary operands, we expect the user to define the classes and their
63 // By partitioning the operands in this way, we guarantee that for any
65 // of the sets of operands which could classify to that tuple.
78 // Some targets need a custom way to parse operands, some specific instructions
146 /// class of operands which can be matched.
169 /// sake user operands only record their immediate super class, while registe
[all...] |
| DAGISelMatcher.h | [all...] |
| /external/llvm/lib/Analysis/ |
| ScalarEvolutionNormalization.cpp | 109 SmallVector<const SCEV *, 8> Operands;
111 // The addrec conceptually uses its operands at loop entry.
116 Operands.push_back(TransformSubExpr(*I, LUser, nullptr));
119 const SCEV *Result = SE.getAddRecExpr(Operands, L, SCEV::FlagAnyWrap);
191 SmallVector<const SCEV *, 8> Operands;
199 Operands.push_back(N);
204 case scAddExpr: return SE.getAddExpr(Operands);
205 case scMulExpr: return SE.getMulExpr(Operands);
206 case scSMaxExpr: return SE.getSMaxExpr(Operands);
207 case scUMaxExpr: return SE.getUMaxExpr(Operands);
[all...] |
| ScalarEvolution.cpp | 527 // Compare the number of operands.
856 SmallVector<const SCEV *, 4> Operands;
861 Operands.push_back(S);
864 return getAddExpr(Operands);
871 SmallVector<const SCEV *, 4> Operands;
[all...] |
| /external/llvm/lib/Transforms/IPO/ |
| StripSymbols.cpp | 144 SmallPtrSet<Constant*, 4> Operands;
147 Operands.insert(cast<Constant>(C->getOperand(i)));
157 for (SmallPtrSet<Constant*, 4>::iterator OI = Operands.begin(),
158 OE = Operands.end(); OI != OE; ++OI)
|
| ArgumentPromotion.cpp | 21 // more than three operands to the function, because passing thousands of
22 // operands for a large array or structure is unprofitable! This limit can be
268 // This load is safe if any prefix of its operands is safe to load.
385 IndicesVector Operands;
388 Operands.clear();
394 Operands.push_back(0);
411 Operands.push_back(C->getSExtValue());
430 // is safe if Operands, or a prefix of Operands, is marked as safe.
431 if (!PrefixIn(Operands, SafeToUnconditionallyLoad)
[all...] |
| /external/llvm/include/llvm/CodeGen/ |
| MachineInstr.h | 74 // Operands are allocated by an ArrayRecycler.
75 MachineOperand *Operands; // Pointer to the first operand.
76 unsigned NumOperands; // Number of operands on instruction.
78 OperandCapacity CapOperands; // Capacity of the Operands array.
111 /// implicit operands. It reserves space for number of operands specified by
272 /// Access to explicit operands of the instruction.
278 return Operands[i];
282 return Operands[i];
285 /// getNumExplicitOperands - Returns the number of non-implicit operands
[all...] |
| /external/llvm/include/llvm/IR/ |
| Metadata.h | 146 /// getNumOperands - Return number of MDNode operands.
157 // critical code because it recursively visits all the MDNode's operands.
205 void *Operands; // SmallVector<TrackingVH<MDNode>, 4>
265 /// getNumOperands - Return the number of NamedMDNode operands.
291 inline iterator_range<op_iterator> operands() { function in class:llvm::NamedMDNode
294 inline iterator_range<const_op_iterator> operands() const { function in class:llvm::NamedMDNode
|
| /external/llvm/include/llvm/MC/ |
| MCInst.h | 31 /// MCOperand - Instances of this class represent operands of the MCInst class.
153 SmallVector<MCOperand, 8> Operands;
163 const MCOperand &getOperand(unsigned i) const { return Operands[i]; }
164 MCOperand &getOperand(unsigned i) { return Operands[i]; }
165 unsigned getNumOperands() const { return Operands.size(); }
168 Operands.push_back(Op);
171 void clear() { Operands.clear(); }
172 size_t size() { return Operands.size(); }
175 iterator begin() { return Operands.begin(); }
176 iterator end() { return Operands.end();
[all...] |
| /external/llvm/lib/DebugInfo/ |
| DWARFDebugFrame.cpp | 61 /// opcode and an optional sequence of operands.
62 typedef std::vector<uint64_t> Operands;
69 Operands Ops;
75 /// operands to the Instructions vector.
126 // No operands
130 // Operands: Address
134 // Operands: 1-byte delta
138 // Operands: 2-byte delta
142 // Operands: 4-byte delta
150 // Operands: ULEB12
[all...] |
| /external/llvm/lib/Transforms/Utils/ |
| CloneFunction.cpp | 168 SmallVector<Value*, 16> Operands;
170 Operands.push_back(Node->getOperand(i));
172 Operands.push_back(Operand);
173 MDNode *NewNode = MDNode::get(Node->getContext(), Operands);
320 // Eagerly remap operands to the newly cloned instruction, except for PHI
484 // Map operands for blocks that are live and remove operands for blocks
|
| /external/llvm/lib/IR/ |
| ConstantsContext.h | 58 // allocate space for exactly two operands
79 // allocate space for exactly three operands
100 // allocate space for exactly two operands
121 // allocate space for exactly three operands
143 // allocate space for exactly three operands
242 // allocate space for exactly two operands
326 operands(ops.begin(), ops.end()), indices(inds.begin(), inds.end()) {}
330 std::vector<Constant*> operands; member in struct:llvm::ExprMapKeyType
336 this->operands == that.operands &
[all...] |
| /external/llvm/lib/MC/MCAnalysis/ |
| MCModuleYAML.cpp | 95 std::vector<Operand> Operands;
195 IO.mapRequired("Ops", I.Operands);
323 A.Insts[i].Operands.resize(OpCount);
325 A.Insts[i].Operands[oi].MCOp = MCDI.Inst.getOperand(oi);
381 for (OpIt OI = II->Operands.begin(), OE = II->Operands.end(); OI != OE;
|
| /external/llvm/include/llvm/Analysis/ |
| ScalarEvolutionExpressions.h | 140 const SCEV *const *Operands;
145 : SCEV(ID, T), Operands(O), NumOperands(N) {}
151 return Operands[i];
156 op_iterator op_begin() const { return Operands; }
157 op_iterator op_end() const { return Operands + NumOperands; }
158 op_range operands() const {
286 /// All operands of an AddRec are required to be loop invariant.
298 const SCEV *getStart() const { return Operands[0]; }
671 SmallVector<const SCEV *, 2> Operands;
673 Operands.push_back(visit(Expr->getOperand(i)))
[all...] |
| /external/chromium_org/third_party/mesa/src/src/gallium/drivers/radeon/ |
| AMDILPeepholeOptimizer.cpp | 663 Value *Operands[4] = {
669 CallInst *CI = CallInst::Create(Func, Operands, "BitInsertOpt");
828 Value *Operands[3] = {
833 // Lets create the Call with the operands
834 CallInst *CI = CallInst::Create(Func, Operands, "ByteExtractOpt");
[all...] |
| /external/llvm/lib/Transforms/Scalar/ |
| SCCP.cpp | 429 // because they have potentially new operands.
667 // Look at all of the executable operands of the PHI node. If any of them
671 // If there are no executable operands, the PHI remains undefined.
862 // Otherwise, one of our operands is overdefined. Try to produce something
[all...] |
| /external/mesa3d/src/gallium/drivers/radeon/ |
| AMDILPeepholeOptimizer.cpp | 663 Value *Operands[4] = {
669 CallInst *CI = CallInst::Create(Func, Operands, "BitInsertOpt");
828 Value *Operands[3] = {
833 // Lets create the Call with the operands
834 CallInst *CI = CallInst::Create(Func, Operands, "ByteExtractOpt");
[all...] |
| /external/llvm/lib/Target/Mips/AsmParser/ |
| MipsAsmParser.cpp | 78 OperandVector &Operands, MCStreamer &Out,
85 bool ParseParenSuffix(StringRef Name, OperandVector &Operands);
87 bool ParseBracketSuffix(StringRef Name, OperandVector &Operands);
90 SMLoc NameLoc, OperandVector &Operands) override;
94 MipsAsmParser::OperandMatchResultTy parseMemOperand(OperandVector &Operands);
97 MatchAnyRegisterNameWithoutDollar(OperandVector &Operands,
101 MatchAnyRegisterWithoutDollar(OperandVector &Operands, SMLoc S);
103 MipsAsmParser::OperandMatchResultTy ParseAnyRegister(OperandVector &Operands);
105 MipsAsmParser::OperandMatchResultTy ParseImm(OperandVector &Operands);
107 MipsAsmParser::OperandMatchResultTy ParseJumpTarget(OperandVector &Operands);
[all...] |
