| /external/chromium_org/third_party/mesa/src/src/mesa/swrast/ |
| s_blend.c | 489 const GLfloat Rd = dest[i][RCOMP];
511 sR = Rd;
516 sR = 1.0F - Rd;
673 dR = Rd;
678 dR = 1.0F - Rd;
743 r = Rs * sR + Rd * dR;
749 r = Rs * sR - Rd * dR;
755 r = Rd * dR - Rs * sR;
761 r = MIN2( Rd, Rs );
766 r = MAX2( Rd, Rs )
[all...] |
| /external/mesa3d/src/mesa/swrast/ |
| s_blend.c | 489 const GLfloat Rd = dest[i][RCOMP];
511 sR = Rd;
516 sR = 1.0F - Rd;
673 dR = Rd;
678 dR = 1.0F - Rd;
743 r = Rs * sR + Rd * dR;
749 r = Rs * sR - Rd * dR;
755 r = Rd * dR - Rs * sR;
761 r = MIN2( Rd, Rs );
766 r = MAX2( Rd, Rs )
[all...] |
| /external/llvm/lib/Target/AArch64/Disassembler/ |
| AArch64Disassembler.cpp | 669 unsigned Rd = fieldFromInstruction(Insn, 0, 5);
674 DecodeFPR128RegisterClass(Inst, Rd, Address, Decoder);
677 DecodeGPR64RegisterClass(Inst, Rd, Address, Decoder);
[all...] |
| /art/disassembler/ |
| disassembler_arm.cc | 274 // Show only Rd and Rm.
287 // Rd is unused (and not shown), and we don't show the 's' suffix either.
511 ArmRegister Rd(instr, 8);
523 args << Rt << "," << Rd << ", [" << Rn;
538 args << Rd << ", " << Rt << ", [" << Rn << ", #" << (imm8 << 2) << "]";
539 if (Rd.r == 13 || Rd.r == 15 || Rt.r == 13 || Rt.r == 15 || Rn.r == 15 ||
540 Rd.r == Rn.r || Rd.r == Rt.r) {
550 Rd = ArmRegister(instr, 0)
[all...] |
| /system/core/libpixelflinger/tests/arch-arm64/assembler/ |
| arm64_assembler_test.cpp | 414 void dataOpTest(dataOpTest_t test, ARMAssemblerInterface *a64asm, uint32_t Rd = 0,
428 regs[Rd] = test.RdValue;
450 case INSTR_ADD: a64asm->ADD(test.cond, test.setFlags, Rd,Rn,op2); break;
451 case INSTR_SUB: a64asm->SUB(test.cond, test.setFlags, Rd,Rn,op2); break;
452 case INSTR_RSB: a64asm->RSB(test.cond, test.setFlags, Rd,Rn,op2); break;
453 case INSTR_AND: a64asm->AND(test.cond, test.setFlags, Rd,Rn,op2); break;
454 case INSTR_ORR: a64asm->ORR(test.cond, test.setFlags, Rd,Rn,op2); break;
455 case INSTR_BIC: a64asm->BIC(test.cond, test.setFlags, Rd,Rn,op2); break;
456 case INSTR_MUL: a64asm->MUL(test.cond, test.setFlags, Rd,Rm,Rs); break;
457 case INSTR_MLA: a64asm->MLA(test.cond, test.setFlags, Rd,Rm,Rs,Rn); break
[all...] |
| /external/llvm/lib/Target/ARM/Disassembler/ |
| ARMDisassembler.cpp | [all...] |
| /external/lldb/source/Plugins/Instruction/ARM/ |
| EmulateInstructionARM.cpp | 618 uint32_t Rd; // the destination register
622 Rd = 7;
626 Rd = Bits32(opcode, 15, 12);
641 if (!WriteRegisterUnsigned (context, eRegisterKindDWARF, dwarf_r0 + Rd, addr))
677 uint32_t Rd; // the destination register
680 Rd = 7;
683 Rd = 12;
690 if (Rd == GetFramePointerRegisterNumber())
698 if (!WriteRegisterUnsigned (context, eRegisterKindDWARF, dwarf_r0 + Rd, sp))
740 uint32_t Rd; // the destination registe
[all...] |
| /external/qemu/disas/ |
| i386.c | 348 #define Rd { OP_R, d_mode }
[all...] |
