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Searched
defs:SubRegs
(Results
1 - 6
of
6
) sorted by null
/external/llvm/lib/Target/R600/
AMDGPURegisterInfo.cpp
50
static const unsigned
SubRegs
[] = {
57
assert(Channel < array_lengthof(
SubRegs
));
58
return
SubRegs
[Channel];
/external/llvm/include/llvm/MC/
MCRegisterInfo.h
103
/// register. The
SubRegs
field is a zero terminated array of registers that
111
uint32_t
SubRegs
; // Sub-register set, described above
115
// sub-register in
SubRegs
.
445
init(Reg, MCRI->DiffLists + MCRI->get(Reg).
SubRegs
);
/external/llvm/utils/TableGen/
CodeGenRegisters.h
142
return
SubRegs
;
235
SubRegMap
SubRegs
;
CodeGenRegisters.cpp
119
std::vector<Record*> SRs = TheDef->getValueAsListOfDefs("
SubRegs
");
123
"
SubRegs
and SubRegIndices must have the same size");
131
// covered-by-
subregs
super-registers where it appears as the first explicit
213
for (SubRegMap::const_iterator I =
SubRegs
.begin(), E =
SubRegs
.end();
226
return
SubRegs
;
229
// First insert the explicit
subregs
and make sure they are fully indexed.
233
if (!
SubRegs
.insert(std::make_pair(Idx, SR)).second)
241
// Keep track of inherited
subregs
and how they can be reached.
244
// Clone inherited
subregs
and place duplicate entries in Orphans
[
all
...]
/external/llvm/lib/Target/AArch64/
AArch64ISelDAGToDAG.cpp
138
unsigned
SubRegs
[]);
834
static unsigned
SubRegs
[] = { AArch64::dsub0, AArch64::dsub1,
837
return createTuple(Regs, RegClassIDs,
SubRegs
);
843
static unsigned
SubRegs
[] = { AArch64::qsub0, AArch64::qsub1,
846
return createTuple(Regs, RegClassIDs,
SubRegs
);
851
unsigned
SubRegs
[]) {
870
Ops.push_back(CurDAG->getTargetConstant(
SubRegs
[i], MVT::i32));
[
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...]
/external/llvm/lib/Target/ARM/
ARMBaseInstrInfo.cpp
701
unsigned
SubRegs
= 0;
708
SubRegs
= 2;
712
SubRegs
= 4;
717
SubRegs
= 2;
721
SubRegs
= 3;
725
SubRegs
= 4;
729
SubRegs
= 2;
733
SubRegs
= 2;
738
SubRegs
= 3;
743
SubRegs
= 4
[
all
...]
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