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  /external/valgrind/main/none/tests/
pth_once.stdout.exp 2 identify_yourself: Hi, I'm a thread
3 identify_yourself: Hi, I'm a thread
4 identify_yourself: Hi, I'm a thread
5 identify_yourself: Hi, I'm a thread
6 identify_yourself: Hi, I'm a thread
7 identify_yourself: Hi, I'm a thread
8 identify_yourself: Hi, I'm a thread
9 identify_yourself: Hi, I'm a thread
10 identify_yourself: Hi, I'm a thread
11 identify_yourself: Hi, I'm a threa
    [all...]
  /external/valgrind/main/drd/tests/
tc21_pthonce.stdout.exp 3 child: Hi, I'm thread 0
4 child: Hi, I'm thread 1
  /external/valgrind/main/helgrind/tests/
tc21_pthonce.stdout.exp 3 child: Hi, I'm thread 0
4 child: Hi, I'm thread 1
  /external/llvm/lib/CodeGen/SelectionDAG/
LegalizeTypes.h 163 SDValue JoinIntegers(SDValue Lo, SDValue Hi);
172 void SplitInteger(SDValue Op, SDValue &Lo, SDValue &Hi);
174 SDValue &Lo, SDValue &Hi);
297 /// of Op are exactly equal to the bits of Lo; the high bits exactly equal Hi.
300 /// Op, and Hi being equal to the upper 32 bits.
301 void GetExpandedInteger(SDValue Op, SDValue &Lo, SDValue &Hi);
302 void SetExpandedInteger(SDValue Op, SDValue Lo, SDValue Hi);
307 SDValue &Lo, SDValue &Hi);
308 void ExpandIntRes_ANY_EXTEND (SDNode *N, SDValue &Lo, SDValue &Hi);
309 void ExpandIntRes_AssertSext (SDNode *N, SDValue &Lo, SDValue &Hi);
    [all...]
LegalizeTypesGeneric.cpp 14 // computation in two identical registers of a smaller type. The Lo/Hi part
32 // These routines assume that the Lo/Hi part is stored first in memory on
33 // little/big-endian machines, followed by the Hi/Lo part. This means that
36 SDValue &Lo, SDValue &Hi) {
38 GetExpandedOp(Op, Lo, Hi);
41 void DAGTypeLegalizer::ExpandRes_BITCAST(SDNode *N, SDValue &Lo, SDValue &Hi) {
55 SplitInteger(GetSoftenedFloat(InOp), Lo, Hi);
57 Hi = DAG.getNode(ISD::BITCAST, dl, NOutVT, Hi);
62 GetExpandedOp(InOp, Lo, Hi);
    [all...]
LegalizeFloatTypes.cpp     [all...]
LegalizeIntegerTypes.cpp 266 SDValue Lo, Hi;
267 GetSplitVector(N->getOperand(0), Lo, Hi);
269 Hi = BitConvertToInteger(Hi);
272 std::swap(Lo, Hi);
277 JoinIntegers(Lo, Hi));
707 SDValue Hi = DAG.getNode(ISD::SRL, DL, Mul.getValueType(), Mul,
709 Overflow = DAG.getSetCC(DL, N->getValueType(1), Hi,
710 DAG.getConstant(0, Hi.getValueType()), ISD::SETNE);
    [all...]
LegalizeVectorTypes.cpp 543 SDValue Lo, Hi;
559 case ISD::MERGE_VALUES: SplitRes_MERGE_VALUES(N, ResNo, Lo, Hi); break;
561 case ISD::SELECT: SplitRes_SELECT(N, Lo, Hi); break;
562 case ISD::SELECT_CC: SplitRes_SELECT_CC(N, Lo, Hi); break;
563 case ISD::UNDEF: SplitRes_UNDEF(N, Lo, Hi); break;
564 case ISD::BITCAST: SplitVecRes_BITCAST(N, Lo, Hi); break;
565 case ISD::BUILD_VECTOR: SplitVecRes_BUILD_VECTOR(N, Lo, Hi); break;
566 case ISD::CONCAT_VECTORS: SplitVecRes_CONCAT_VECTORS(N, Lo, Hi); break;
567 case ISD::EXTRACT_SUBVECTOR: SplitVecRes_EXTRACT_SUBVECTOR(N, Lo, Hi); break;
568 case ISD::INSERT_SUBVECTOR: SplitVecRes_INSERT_SUBVECTOR(N, Lo, Hi); break
    [all...]
LegalizeTypes.cpp 771 SDValue &Hi) {
777 Hi = Entry.second;
781 SDValue Hi) {
784 Hi.getValueType() == Lo.getValueType() &&
786 // Lo/Hi may have been newly allocated, if so, add nodeid's as relevant.
788 AnalyzeNewValue(Hi);
794 Entry.second = Hi;
798 SDValue &Hi) {
804 Hi = Entry.second;
808 SDValue Hi) {
    [all...]
LegalizeDAG.cpp 406 SDValue Hi = DAG.getNode(ISD::SRL, dl, VT, Val, ShiftAmount);
410 Store1 = DAG.getTruncStore(Chain, dl, TLI.isLittleEndian()?Lo:Hi, Ptr,
417 Store2 = DAG.getTruncStore(Chain, dl, TLI.isLittleEndian()?Hi:Lo, Ptr,
532 // If the original load is NON_EXTLOAD, the hi part load must be ZEXTLOAD.
537 SDValue Lo, Hi;
544 Hi = DAG.getExtLoad(HiExtType, dl, VT, Chain, Ptr,
550 Hi = DAG.getExtLoad(HiExtType, dl, VT, Chain, Ptr, LD->getPointerInfo(),
564 TLI.getShiftAmountTy(Hi.getValueType()));
565 SDValue Result = DAG.getNode(ISD::SHL, dl, VT, Hi, ShiftAmount);
569 Hi.getValue(1))
    [all...]
  /external/llvm/include/llvm/Support/
SwapByteOrder.h 33 uint16_t Hi = value << 8;
35 return Hi | Lo;
65 uint64_t Hi = SwapByteOrder_32(uint32_t(value));
67 return (Hi << 32) | Lo;
GCOV.h 202 uint32_t Lo, Hi;
203 if (!readInt(Lo) || !readInt(Hi)) return false;
204 Val = ((uint64_t)Hi << 32) | Lo;
  /external/llvm/lib/Target/Mips/
MipsJITInfo.cpp 172 // lui $t9, %hi(NewVal)
177 int Hi = ((unsigned)NewVal & 0xffff0000) >> 16;
179 Hi++;
182 *(intptr_t *)(StubAddr) = 0xf << 26 | 25 << 16 | Hi;
217 int Hi = ((unsigned)EmittedAddr & 0xffff0000) >> 16;
219 Hi++;
222 // lui $t9, %hi(EmittedAddr)
227 JCE.emitWordLE(0xf << 26 | 25 << 16 | Hi);
232 JCE.emitWordBE(0xf << 26 | 25 << 16 | Hi);
MipsISelLowering.h 40 // No relation with Mips Hi register
41 Hi,
300 // (load (wrapper (add %hi(sym), $gp), %lo(sym)))
307 SDValue Hi = DAG.getNode(MipsISD::Hi, DL, Ty,
309 Hi = DAG.getNode(ISD::ADD, DL, Ty, Hi, getGlobalReg(DAG, Ty));
310 SDValue Wrapper = DAG.getNode(MipsISD::Wrapper, DL, Ty, Hi,
319 // (add %hi(sym), %lo(sym))
323 SDValue Hi = getTargetNode(N, Ty, DAG, MipsII::MO_ABS_HI)
    [all...]
Mips16ISelDAGToDAG.cpp 48 SDNode *Lo = nullptr, *Hi = nullptr;
60 Hi = CurDAG->getMachineNode(Opcode, DL, Ty, InFlag);
62 return std::make_pair(Lo, Hi);
208 // lui $2, %hi($CPI1_0)
212 // lui $2, %hi($CPI1_0)
MipsFastISel.cpp 383 unsigned Hi = (Imm >> 16) & 0xFFFF;
385 // Both Lo and Hi have nonzero bits.
387 EmitInst(Mips::LUi, TmpReg).addImm(Hi);
390 EmitInst(Mips::LUi, ResultReg).addImm(Hi);
  /external/chromium_org/third_party/webrtc/common_audio/signal_processing/
spl_sqrt_floor_arm.S 9 @ Hi Kevin,
20 @ Hi Wilco,
  /external/llvm/include/llvm/IR/
MDBuilder.h 62 /// \brief Return metadata describing the range [Lo, Hi).
63 MDNode *createRange(const APInt &Lo, const APInt &Hi);
  /external/llvm/lib/IR/
MDBuilder.cpp 51 MDNode *MDBuilder::createRange(const APInt &Lo, const APInt &Hi) {
52 assert(Lo.getBitWidth() == Hi.getBitWidth() && "Mismatched bitwidths!");
54 if (Hi == Lo)
57 // Return the range [Lo, Hi).
59 Value *Range[2] = {ConstantInt::get(Ty, Lo), ConstantInt::get(Ty, Hi)};
  /external/chromium_org/third_party/openssl/openssl/crypto/modes/asm/
ghash-ia64.pl 58 { .mfi; (p18) ld8 Hlo=[Hi[1]],-8
62 { .mfi; (p18) ld8 Hhi=[Hi[1]]
65 (p18) and Hi[1]=mask0xf0,xi[2] };;
70 (p18) add Hi[1]=Htbl,Hi[1] };;
72 { .mfi; (p18) ld8 Hlo=[Hi[1]],-8
74 { .mfi; (p17) shladd Hi[0]=xi[1],4,r0
76 { .mfi; (p18) ld8 Hhi=[Hi[1]]
79 (p17) and Hi[0]=mask0xf0,Hi[0] };
    [all...]
  /external/openssl/crypto/modes/asm/
ghash-ia64.pl 58 { .mfi; (p18) ld8 Hlo=[Hi[1]],-8
62 { .mfi; (p18) ld8 Hhi=[Hi[1]]
65 (p18) and Hi[1]=mask0xf0,xi[2] };;
70 (p18) add Hi[1]=Htbl,Hi[1] };;
72 { .mfi; (p18) ld8 Hlo=[Hi[1]],-8
74 { .mfi; (p17) shladd Hi[0]=xi[1],4,r0
76 { .mfi; (p18) ld8 Hhi=[Hi[1]]
79 (p17) and Hi[0]=mask0xf0,Hi[0] };
    [all...]
  /external/llvm/lib/Target/XCore/
XCoreISelLowering.cpp 569 SDValue Hi = DAG.getNode(XCoreISD::MACCS, dl,
572 SDValue Lo(Hi.getNode(), 1);
573 SDValue Ops[] = { Lo, Hi };
586 SDValue Hi = DAG.getNode(XCoreISD::LMUL, dl,
589 SDValue Lo(Hi.getNode(), 1);
590 SDValue Ops[] = { Lo, Hi };
683 SDValue Hi = DAG.getNode(XCoreISD::MACCU, dl,
686 SDValue Lo(Hi.getNode(), 1);
687 return DAG.getNode(ISD::BUILD_PAIR, dl, MVT::i64, Lo, Hi);
691 SDValue Hi = DAG.getNode(XCoreISD::MACCS, dl
    [all...]
  /external/clang/lib/CodeGen/
TargetInfo.cpp     [all...]
  /external/llvm/include/llvm/CodeGen/
AsmPrinter.h 343 /// Emit something like ".long Hi-Lo" where the size in bytes of the directive
344 /// is specified by Size and Hi/Lo specify the labels. This implicitly uses
346 void EmitLabelDifference(const MCSymbol *Hi, const MCSymbol *Lo,
349 /// Emit something like ".long Hi+Offset-Lo" where the size in bytes of the
350 /// directive is specified by Size and Hi/Lo specify the labels. This
352 void EmitLabelOffsetDifference(const MCSymbol *Hi, uint64_t Offset,
  /external/llvm/lib/Target/Hexagon/
HexagonISelLowering.h 43 Hi, Lo, // Hi/Lo operations, typically on a global address.

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