| /external/clang/test/SemaTemplate/ |
| nested-name-spec-template.cpp | 5 template<typename T> struct Promote;
7 template<> struct Promote<short> {
11 template<> struct Promote<int> {
15 template<> struct Promote<float> {
19 Promote<short>::type *ret_intptr(int* ip) { return ip; }
20 Promote<int>::type *ret_intptr2(int* ip) { return ip; }
23 M::Promote<int>::type *ret_intptr3(int* ip) { return ip; }
24 M::template Promote<int>::type *ret_intptr4(int* ip) { return ip; } // expected-warning{{'template' keyword outside of a template}}
25 M::template Promote<int> pi; // expected-warning{{'template' keyword outside of a template}}
28 N::M::Promote<int>::type *ret_intptr5(int* ip) { return ip;
[all...] |
| /external/llvm/examples/OCaml-Kaleidoscope/Chapter7/ |
| toy.ml | 33 (* Promote allocas to registers. *)
|
| /art/runtime/jdwp/ |
| object_registry.h | 57 // also promote references to regular JNI global references (and demote them back again if
113 void Promote(ObjectRegistryEntry& entry)
|
| object_registry.cc | 160 Promote(*it->second);
182 void ObjectRegistry::Promote(ObjectRegistryEntry& entry) {
|
| /external/llvm/lib/Target/Hexagon/ |
| HexagonISelLowering.cpp | 477 // Promote the value if needed.
[all...] |
| /external/lldb/include/lldb/Core/ |
| Scalar.h | 19 // Operators are defined and Scalar objects will correctly promote
101 Promote(Scalar::Type type);
|
| /external/llvm/lib/Target/R600/ |
| AMDGPUISelLowering.cpp | 136 setOperationAction(ISD::STORE, MVT::f32, Promote);
139 setOperationAction(ISD::STORE, MVT::v2f32, Promote);
142 setOperationAction(ISD::STORE, MVT::i64, Promote);
145 setOperationAction(ISD::STORE, MVT::v4f32, Promote);
148 setOperationAction(ISD::STORE, MVT::v8f32, Promote);
151 setOperationAction(ISD::STORE, MVT::v16f32, Promote);
154 setOperationAction(ISD::STORE, MVT::f64, Promote);
157 setOperationAction(ISD::STORE, MVT::v2f64, Promote);
182 setOperationAction(ISD::LOAD, MVT::f32, Promote);
185 setOperationAction(ISD::LOAD, MVT::v2f32, Promote);
[all...] |
| SIISelLowering.cpp | 103 setOperationAction(ISD::SELECT, MVT::f32, Promote);
106 setOperationAction(ISD::SELECT, MVT::f64, Promote);
141 setLoadExtAction(ISD::SEXTLOAD, MVT::i1, Promote);
148 setLoadExtAction(ISD::ZEXTLOAD, MVT::i1, Promote);
153 setLoadExtAction(ISD::EXTLOAD, MVT::i1, Promote);
[all...] |
| /external/llvm/include/llvm/Target/ |
| TargetLowering.h | 86 Promote, // This operation should be executed in a larger type.
194 // The default action for other vectors is to promote
372 /// legal (return 'Legal') or we need to promote it to a larger type (return
373 /// 'Promote'), or we need to expand it into multiple registers of smaller
384 /// to promote to. For integer types that are larger than the largest integer
501 getOperationAction(Op, VT) == Promote);
597 assert(Action != Promote && "Can't promote condition code!");
609 /// If the action for this operation is to promote, this method returns the
610 /// ValueType to promote to
[all...] |
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| LegalizeVectorOps.cpp | 113 SDValue Promote(SDValue Op);
312 case TargetLowering::Promote:
313 Result = Promote(Op);
342 SDValue VectorLegalizer::Promote(SDValue Op) {
348 // "Promote" the operation by extending the operand.
352 // Promote the operation by extending the operand.
361 "Can't promote a vector with multiple results!");
383 "Can't promote a vector with multiple results!");
385 // Normal getTypeToPromoteTo() doesn't work here, as that will promote
410 // For FP_TO_INT we promote the result type to a vector type with wide
[all...] |
| LegalizeDAG.cpp | 196 assert(NumEltsGrowth && "Cannot promote to vector type with fewer elts!");
749 case TargetLowering::Promote: {
752 "Can only promote stores to same size type");
[all...] |
| /external/llvm/lib/Target/X86/ |
| X86ISelLowering.cpp | 309 setLoadExtAction(ISD::SEXTLOAD, MVT::i1, Promote);
327 // Promote all UINT_TO_FP to larger SINT_TO_FP's, as X86 doesn't have this
329 setOperationAction(ISD::UINT_TO_FP , MVT::i1 , Promote);
330 setOperationAction(ISD::UINT_TO_FP , MVT::i8 , Promote);
331 setOperationAction(ISD::UINT_TO_FP , MVT::i16 , Promote);
334 setOperationAction(ISD::UINT_TO_FP , MVT::i32 , Promote);
345 // Promote i1/i8 SINT_TO_FP to larger SINT_TO_FP's, as X86 doesn't have
347 setOperationAction(ISD::SINT_TO_FP , MVT::i1 , Promote);
348 setOperationAction(ISD::SINT_TO_FP , MVT::i8 , Promote);
353 setOperationAction(ISD::SINT_TO_FP , MVT::i16 , Promote);
[all...] |
| /external/chromium_org/v8/test/mjsunit/harmony/ |
| private.js | 13 // contributors may be used to endorse or promote products derived
50 gc() // Promote existing symbols and then allocate some more.
|
| /external/llvm/lib/Target/MSP430/ |
| MSP430ISelLowering.cpp | 83 setLoadExtAction(ISD::EXTLOAD, MVT::i1, Promote);
84 setLoadExtAction(ISD::SEXTLOAD, MVT::i1, Promote);
85 setLoadExtAction(ISD::ZEXTLOAD, MVT::i1, Promote);
307 // Promote i8 to i16
607 // Promote the value if needed.
[all...] |
| /external/lldb/source/Core/ |
| Scalar.cpp | 27 // Promote to max type currently follows the ANSI C rule for type
54 if (temp_value.Promote(lhs_type)) // Promote it
61 if (temp_value.Promote(rhs_type)) // Promote it
69 // Return the void type (zero) if we fail to promote either of the values.
345 Scalar::Promote(Scalar::Type type)
[all...] |
| /external/llvm/lib/Target/XCore/ |
| XCoreISelLowering.cpp | 130 setLoadExtAction(ISD::EXTLOAD, MVT::i1, Promote);
131 setLoadExtAction(ISD::ZEXTLOAD, MVT::i1, Promote);
132 setLoadExtAction(ISD::SEXTLOAD, MVT::i1, Promote);
[all...] |
| /external/chromium_org/v8/test/mjsunit/es6/ |
| symbols.js | 13 // contributors may be used to endorse or promote products derived
58 gc() // Promote existing symbols and then allocate some more.
|
| /external/llvm/lib/Target/PowerPC/ |
| PPCISelLowering.cpp | 83 setLoadExtAction(ISD::SEXTLOAD, MVT::i1, Promote);
104 setOperationAction(ISD::SINT_TO_FP, MVT::i1, Promote);
107 setOperationAction(ISD::UINT_TO_FP, MVT::i1, Promote);
123 setLoadExtAction(ISD::SEXTLOAD, MVT::i1, Promote);
124 setLoadExtAction(ISD::ZEXTLOAD, MVT::i1, Promote);
301 // VAARG always uses double-word chunks, so promote anything smaller.
302 setOperationAction(ISD::VAARG, MVT::i1, Promote);
304 setOperationAction(ISD::VAARG, MVT::i8, Promote);
306 setOperationAction(ISD::VAARG, MVT::i16, Promote);
308 setOperationAction(ISD::VAARG, MVT::i32, Promote);
[all...] |
| /external/llvm/lib/Target/SystemZ/ |
| SystemZISelLowering.cpp | 204 setOperationAction(ISD::UINT_TO_FP, MVT::i32, Promote);
209 setOperationAction(ISD::CTLZ, MVT::i32, Promote);
221 setLoadExtAction(ISD::SEXTLOAD, MVT::i1, Promote);
222 setLoadExtAction(ISD::ZEXTLOAD, MVT::i1, Promote);
223 setLoadExtAction(ISD::EXTLOAD, MVT::i1, Promote);
[all...] |
| /external/llvm/lib/Target/AArch64/ |
| AArch64ISelLowering.cpp | 424 // elements smaller than i32, so promote the input to i32 first.
425 setOperationAction(ISD::UINT_TO_FP, MVT::v4i8, Promote);
426 setOperationAction(ISD::SINT_TO_FP, MVT::v4i8, Promote);
427 setOperationAction(ISD::UINT_TO_FP, MVT::v4i16, Promote);
428 setOperationAction(ISD::SINT_TO_FP, MVT::v4i16, Promote);
479 setOperationAction(ISD::LOAD, VT.getSimpleVT(), Promote);
482 setOperationAction(ISD::STORE, VT.getSimpleVT(), Promote);
485 setOperationAction(ISD::LOAD, VT.getSimpleVT(), Promote);
488 setOperationAction(ISD::STORE, VT.getSimpleVT(), Promote);
[all...] |
| /external/llvm/lib/Target/Mips/ |
| MipsISelLowering.cpp | 225 setLoadExtAction(ISD::EXTLOAD, MVT::i1, Promote);
226 setLoadExtAction(ISD::ZEXTLOAD, MVT::i1, Promote);
227 setLoadExtAction(ISD::SEXTLOAD, MVT::i1, Promote);
[all...] |
| /external/llvm/lib/Target/NVPTX/ |
| NVPTXISelLowering.cpp | 208 setLoadExtAction(ISD::SEXTLOAD, MVT::i1, Promote);
209 setLoadExtAction(ISD::ZEXTLOAD, MVT::i1, Promote);
[all...] |
| /external/llvm/lib/Target/ARM/ |
| ARMISelLowering.cpp | 92 setOperationAction(ISD::LOAD, VT, Promote);
95 setOperationAction(ISD::STORE, VT, Promote);
129 // Promote all bit-wise operations.
131 setOperationAction(ISD::AND, VT, Promote);
133 setOperationAction(ISD::OR, VT, Promote);
135 setOperationAction(ISD::XOR, VT, Promote);
589 setLoadExtAction(ISD::SEXTLOAD, MVT::i1, Promote);
[all...] |
| /external/llvm/lib/Target/Sparc/ |
| SparcISelLowering.cpp | 95 // Promote integers to %i0-%i5.
98 // Promote doubles to %d0-%d30. (Which LLVM calls D0-D15).
101 // Promote floats to %f1, %f3, ...
104 // Promote long doubles to %q0-%q28. (Which LLVM calls Q0-Q7).
107 // Promote to register when possible, otherwise use the stack slot.
133 // Promote floats to %f0-%f31.
140 // Promote integers to %i0-%i5, using half the register.
576 // won't promote the value again in this function.
756 // Promote the value if needed.
[all...] |
