/art/compiler/dex/quick/arm64/ |
assemble_arm64.cc | 531 kFmtBitBlt, 21, 15, IS_QUAD_OP | REG_USE012 | IS_STORE_OFF, 535 kFmtBitBlt, 21, 15, IS_QUAD_OP | REG_USE012 | IS_STORE_OFF, 539 kFmtBitBlt, 21, 15, IS_QUAD_OP | REG_DEF2 | REG_USE012 | IS_STORE, 543 kFmtBitBlt, 21, 15, IS_QUAD_OP | REG_DEF2 | REG_USE012 | IS_STORE [all...] |
/art/compiler/dex/quick/ |
local_optimizations.cc | 41 (flags & REG_USE012) == REG_USE012 || \
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mir_to_lir.h | 128 #define REG_USE012 (REG_USE01 | REG_USE2) [all...] |
/art/compiler/dex/quick/arm/ |
assemble_arm.cc | 361 kFmtUnused, -1, -1, IS_TERTIARY_OP | REG_USE012 | IS_STORE, 373 kFmtUnused, -1, -1, IS_TERTIARY_OP | REG_USE012 | IS_STORE, 381 kFmtUnused, -1, -1, IS_TERTIARY_OP | REG_USE012 | IS_STORE, 475 kFmtUnused, -1, -1, IS_TERTIARY_OP | REG_DEF0 | REG_USE012, [all...] |
/art/compiler/dex/quick/x86/ |
assemble_x86.cc | 42 { kX86 ## opname ## 8RA, kRegArray, IS_LOAD | IS_QUIN_OP | reg_def | REG_USE012 | SETS_CCODES | uses_ccodes, { 0, 0, r8_rm8, 0, 0, 0, 0, 0, true }, #opname "8RA", "!0r,[!1r+!2r<<!3d+!4d]" }, \ 54 { kX86 ## opname ## 16RA, kRegArray, IS_LOAD | IS_QUIN_OP | reg_def | REG_USE012 | SETS_CCODES | uses_ccodes, { 0x66, 0, r32_rm32, 0, 0, 0, 0, 0, false }, #opname "16RA", "!0r,[!1r+!2r<<!3d+!4d]" }, \ 70 { kX86 ## opname ## 32RA, kRegArray, IS_LOAD | IS_QUIN_OP | reg_def | REG_USE012 | SETS_CCODES | uses_ccodes, { 0, 0, r32_rm32, 0, 0, 0, 0, 0, false }, #opname "32RA", "!0r,[!1r+!2r<<!3d+!4d]" }, \ 86 { kX86 ## opname ## 64RA, kRegArray, IS_LOAD | IS_QUIN_OP | reg_def | REG_USE012 | SETS_CCODES | uses_ccodes, { REX_W, 0, r32_rm32, 0, 0, 0, 0, 0, false }, #opname "64RA", "!0r,[!1r+!2r<<!3d+!4d]" }, \ [all...] |