| /external/llvm/include/llvm/CodeGen/ |
| ISDOpcodes.h | 286 /// SCALAR_TO_VECTOR(VAL) - This represents the operation of loading a
292 SCALAR_TO_VECTOR,
[all...] |
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| LegalizeVectorTypes.cpp | 61 case ISD::SCALAR_TO_VECTOR: R = ScalarizeVecRes_SCALAR_TO_VECTOR(N); break;
527 return DAG.getNode(ISD::SCALAR_TO_VECTOR, SDLoc(N), N->getValueType(0), Res);
572 case ISD::SCALAR_TO_VECTOR: SplitVecRes_SCALAR_TO_VECTOR(N, Lo, Hi); break;
[all...] |
| SelectionDAGDumper.cpp | 202 case ISD::SCALAR_TO_VECTOR: return "scalar_to_vector";
|
| LegalizeDAG.cpp | 625 // SCALAR_TO_VECTOR requires that the type of the value being inserted
631 SDValue ScVec = DAG.getNode(ISD::SCALAR_TO_VECTOR, dl,
[all...] |
| LegalizeIntegerTypes.cpp | 90 case ISD::SCALAR_TO_VECTOR:
[all...] |
| DAGCombiner.cpp | [all...] |
| SelectionDAG.cpp | 199 /// ISD::SCALAR_TO_VECTOR node or a BUILD_VECTOR node where only the low
202 if (N->getOpcode() == ISD::SCALAR_TO_VECTOR)
[all...] |
| /external/llvm/lib/Target/R600/ |
| AMDGPUISelDAGToDAG.cpp | 228 case ISD::SCALAR_TO_VECTOR:
319 // Fill in the missing undef elements if this was a scalar_to_vector.
320 assert(Opc == ISD::SCALAR_TO_VECTOR && NOps < NumVectorElts);
|
| /external/llvm/lib/Target/X86/ |
| X86ISelLowering.cpp | [all...] |
| X86ISelDAGToDAG.cpp | [all...] |
| /external/llvm/lib/Target/AArch64/ |
| AArch64ISelLowering.cpp | [all...] |
| /external/llvm/lib/Target/PowerPC/ |
| PPCISelDAGToDAG.cpp | [all...] |
| PPCISelLowering.cpp | 460 setOperationAction(ISD::SCALAR_TO_VECTOR, VT, Expand);
518 setOperationAction(ISD::SCALAR_TO_VECTOR, MVT::v4f32, Custom);
519 setOperationAction(ISD::SCALAR_TO_VECTOR, MVT::v4i32, Custom);
538 setOperationAction(ISD::SCALAR_TO_VECTOR, MVT::v2f64, Legal);
[all...] |
| /external/llvm/lib/Target/ARM/ |
| ARMISelLowering.cpp | [all...] |
