/external/llvm/include/llvm/CodeGen/ |
ISDOpcodes.h | 188 /// SDIVREM/UDIVREM - Divide two integers and produce both a quotient and 190 SDIVREM, UDIVREM, [all...] |
/external/chromium_org/third_party/mesa/src/src/gallium/drivers/radeon/ |
AMDILISelLowering.cpp | 145 setOperationAction(ISD::SDIVREM, VT, Expand); 167 setOperationAction(ISD::SDIVREM, VT, Expand);
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/external/mesa3d/src/gallium/drivers/radeon/ |
AMDILISelLowering.cpp | 145 setOperationAction(ISD::SDIVREM, VT, Expand); 167 setOperationAction(ISD::SDIVREM, VT, Expand);
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/external/llvm/lib/Target/R600/ |
R600ISelLowering.cpp | 866 SDValue SDIVREM = DAG.getNode(ISD::SDIVREM, DL, DAG.getVTList(VT, VT), 868 Results.push_back(SDIVREM); 875 SDValue SDIVREM = DAG.getNode(ISD::SDIVREM, DL, DAG.getVTList(VT, VT), 877 Results.push_back(SDIVREM.getValue(1)); 880 case ISD::SDIVREM: { [all...] |
AMDGPUISelLowering.cpp | 251 setOperationAction(ISD::SDIVREM, VT, Custom); 310 setOperationAction(ISD::SDIVREM, VT, Custom); 537 case ISD::SDIVREM: return LowerSDIVREM(Op, DAG); [all...] |
/external/llvm/lib/CodeGen/SelectionDAG/ |
SelectionDAGDumper.cpp | 172 case ISD::SDIVREM: return "sdivrem";
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LegalizeDAG.cpp | [all...] |
DAGCombiner.cpp | [all...] |
/external/llvm/lib/Target/Mips/ |
MipsSEISelLowering.cpp | 134 setOperationAction(ISD::SDIVREM, MVT::i32, Custom); 136 setOperationAction(ISD::SDIVREM, MVT::i64, Custom); 166 setOperationAction(ISD::SDIVREM, MVT::i32, Expand); 211 setOperationAction(ISD::SDIVREM, MVT::i64, Expand); 366 case ISD::SDIVREM: return lowerMulDiv(Op, MipsISD::DivRem, true, true, DAG); [all...] |
MipsISelLowering.cpp | 386 setTargetDAGCombine(ISD::SDIVREM); 437 unsigned Opc = N->getOpcode() == ISD::SDIVREM ? MipsISD::DivRem16 : 745 case ISD::SDIVREM: [all...] |
/external/llvm/lib/Target/MSP430/ |
MSP430ISelLowering.cpp | 155 setOperationAction(ISD::SDIVREM, MVT::i8, Expand); 161 setOperationAction(ISD::SDIVREM, MVT::i16, Expand); [all...] |
/external/llvm/lib/Target/Hexagon/ |
HexagonISelLowering.cpp | [all...] |
/external/llvm/lib/Target/X86/ |
X86ISelDAGToDAG.cpp | [all...] |
X86ISelLowering.cpp | [all...] |
/external/llvm/lib/Target/Sparc/ |
SparcISelLowering.cpp | [all...] |
/external/llvm/lib/Target/SystemZ/ |
SystemZISelLowering.cpp | 154 setOperationAction(ISD::SDIVREM, VT, Custom); [all...] |
/external/llvm/lib/Target/ARM/ |
ARMISelLowering.cpp | 683 setOperationAction(ISD::SDIVREM, MVT::i32, Custom); 686 setOperationAction(ISD::SDIVREM, MVT::i32, Expand); [all...] |
/external/llvm/lib/Target/AArch64/ |
AArch64ISelLowering.cpp | 249 setOperationAction(ISD::SDIVREM, MVT::i32, Expand); 250 setOperationAction(ISD::SDIVREM, MVT::i64, Expand); [all...] |
/external/llvm/lib/Target/PowerPC/ |
PPCISelLowering.cpp | 151 // Don't use SMUL_LOHI/UMUL_LOHI or SDIVREM/UDIVREM to lower SREM/UREM. 157 setOperationAction(ISD::SDIVREM, MVT::i32, Expand); 159 setOperationAction(ISD::SDIVREM, MVT::i64, Expand); 459 setOperationAction(ISD::SDIVREM, VT, Expand); [all...] |