/external/llvm/lib/Target/ARM/ |
ARMTargetTransformInfo.cpp | 240 { ISD::UINT_TO_FP, MVT::v4f32, MVT::v4i32, 1 }, 243 { ISD::UINT_TO_FP, MVT::v2f32, MVT::v2i8, 3 }, 245 { ISD::UINT_TO_FP, MVT::v2f32, MVT::v2i16, 2 }, 247 { ISD::UINT_TO_FP, MVT::v2f32, MVT::v2i32, 1 }, 249 { ISD::UINT_TO_FP, MVT::v4f32, MVT::v4i1, 3 }, 251 { ISD::UINT_TO_FP, MVT::v4f32, MVT::v4i8, 3 }, 253 { ISD::UINT_TO_FP, MVT::v4f32, MVT::v4i16, 2 }, 255 { ISD::UINT_TO_FP, MVT::v8f32, MVT::v8i16, 4 }, 257 { ISD::UINT_TO_FP, MVT::v8f32, MVT::v8i32, 2 }, 259 { ISD::UINT_TO_FP, MVT::v16f32, MVT::v16i16, 8 } [all...] |
ARMISelLowering.cpp | 106 setOperationAction(ISD::UINT_TO_FP, VT, Custom); 111 setOperationAction(ISD::UINT_TO_FP, VT, Expand); 523 // Neon does not have single instruction SINT_TO_FP and UINT_TO_FP with 528 setOperationAction(ISD::UINT_TO_FP, MVT::v4i16, Custom); [all...] |
/external/llvm/lib/Target/AArch64/ |
AArch64TargetTransformInfo.cpp | 311 { ISD::UINT_TO_FP, MVT::v2f32, MVT::v2i32, 1 }, 312 { ISD::UINT_TO_FP, MVT::v4f32, MVT::v4i32, 1 }, 313 { ISD::UINT_TO_FP, MVT::v2f64, MVT::v2i64, 1 }, 319 { ISD::UINT_TO_FP, MVT::v2f32, MVT::v2i8, 3 }, 320 { ISD::UINT_TO_FP, MVT::v2f32, MVT::v2i16, 3 }, 321 { ISD::UINT_TO_FP, MVT::v2f32, MVT::v2i64, 2 }, 326 { ISD::UINT_TO_FP, MVT::v4f32, MVT::v4i8, 3 }, 327 { ISD::UINT_TO_FP, MVT::v4f32, MVT::v4i16, 2 }, 333 { ISD::UINT_TO_FP, MVT::v2f64, MVT::v2i8, 4 }, 334 { ISD::UINT_TO_FP, MVT::v2f64, MVT::v2i16, 4 } [all...] |
AArch64ISelLowering.cpp | 192 setOperationAction(ISD::UINT_TO_FP, MVT::i32, Custom); 193 setOperationAction(ISD::UINT_TO_FP, MVT::i64, Custom); 194 setOperationAction(ISD::UINT_TO_FP, MVT::i128, Custom); 349 setTargetDAGCombine(ISD::UINT_TO_FP); 418 setOperationAction(ISD::UINT_TO_FP, MVT::v1i64, Expand); 425 setOperationAction(ISD::UINT_TO_FP, MVT::v4i8, Promote); 427 setOperationAction(ISD::UINT_TO_FP, MVT::v4i16, Promote); 431 setOperationAction(ISD::UINT_TO_FP, MVT::v2i32, Custom); 433 setOperationAction(ISD::UINT_TO_FP, MVT::v2i64, Custom); [all...] |
/external/llvm/lib/Target/X86/ |
X86TargetTransformInfo.cpp | 534 { ISD::UINT_TO_FP, MVT::v2f64, MVT::v2i64, 2*10 }, 535 { ISD::UINT_TO_FP, MVT::v2f64, MVT::v4i32, 4*10 }, 536 { ISD::UINT_TO_FP, MVT::v2f64, MVT::v8i16, 8*10 }, 537 { ISD::UINT_TO_FP, MVT::v2f64, MVT::v16i8, 16*10 }, 543 { ISD::UINT_TO_FP, MVT::v4f32, MVT::v2i64, 15 }, 544 { ISD::UINT_TO_FP, MVT::v4f32, MVT::v4i32, 15 }, 545 { ISD::UINT_TO_FP, MVT::v4f32, MVT::v8i16, 15 }, 546 { ISD::UINT_TO_FP, MVT::v4f32, MVT::v16i8, 8 }, 634 { ISD::UINT_TO_FP, MVT::v8f32, MVT::v8i1, 6 }, 635 { ISD::UINT_TO_FP, MVT::v8f32, MVT::v8i8, 5 } [all...] |
X86ISelLowering.cpp | 327 // Promote all UINT_TO_FP to larger SINT_TO_FP's, as X86 doesn't have this 329 setOperationAction(ISD::UINT_TO_FP , MVT::i1 , Promote); 330 setOperationAction(ISD::UINT_TO_FP , MVT::i8 , Promote); 331 setOperationAction(ISD::UINT_TO_FP , MVT::i16 , Promote); 334 setOperationAction(ISD::UINT_TO_FP , MVT::i32 , Promote); 335 setOperationAction(ISD::UINT_TO_FP , MVT::i64 , Custom); 339 setOperationAction(ISD::UINT_TO_FP , MVT::i64 , Custom); 342 setOperationAction(ISD::UINT_TO_FP , MVT::i32 , Custom); [all...] |
/external/llvm/include/llvm/CodeGen/ |
ISDOpcodes.h | 373 UINT_TO_FP, [all...] |
/external/llvm/lib/CodeGen/SelectionDAG/ |
LegalizeVectorOps.cpp | 306 case ISD::UINT_TO_FP: 347 case ISD::UINT_TO_FP: 398 unsigned Opc = Op.getOpcode() == ISD::UINT_TO_FP ? ISD::ZERO_EXTEND : 652 case ISD::UINT_TO_FP: [all...] |
SelectionDAGDumper.cpp | 234 case ISD::UINT_TO_FP: return "uint_to_fp";
|
LegalizeVectorTypes.cpp | 98 case ISD::UINT_TO_FP: 613 case ISD::UINT_TO_FP: [all...] |
LegalizeDAG.cpp | [all...] |
LegalizeFloatTypes.cpp | 102 case ISD::UINT_TO_FP: R = SoftenFloatRes_XINT_TO_FP(N); break; [all...] |
DAGCombiner.cpp | [all...] |
LegalizeIntegerTypes.cpp | [all...] |
/external/llvm/lib/Target/Hexagon/ |
HexagonISelLowering.cpp | [all...] |
/external/chromium_org/third_party/mesa/src/src/gallium/drivers/radeon/ |
R600ISelLowering.cpp | 412 ConversionOp = ISD::UINT_TO_FP;
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/external/mesa3d/src/gallium/drivers/radeon/ |
R600ISelLowering.cpp | 412 ConversionOp = ISD::UINT_TO_FP;
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/external/llvm/lib/Target/R600/ |
AMDGPUISelLowering.cpp | 280 setOperationAction(ISD::UINT_TO_FP, MVT::i64, Custom); 302 setOperationAction(ISD::UINT_TO_FP, VT, Expand); 543 case ISD::UINT_TO_FP: return LowerUINT_TO_FP(Op, DAG); [all...] |
SIISelLowering.cpp | 224 setTargetDAGCombine(ISD::UINT_TO_FP); [all...] |
R600ISelLowering.cpp | [all...] |
/external/llvm/lib/Target/PowerPC/ |
PPCISelLowering.cpp | 107 setOperationAction(ISD::UINT_TO_FP, MVT::i1, Promote); 108 AddPromotedToType (ISD::UINT_TO_FP, MVT::i1, 112 setOperationAction(ISD::UINT_TO_FP, MVT::i1, Custom); 257 setOperationAction(ISD::UINT_TO_FP, MVT::i32, Expand); 357 setOperationAction(ISD::UINT_TO_FP, MVT::i64, Expand); 375 setOperationAction(ISD::UINT_TO_FP, MVT::i64, Custom); 381 setOperationAction(ISD::UINT_TO_FP, MVT::i32, Custom); 495 setOperationAction(ISD::UINT_TO_FP, MVT::v4i32, Legal); 600 setOperationAction(ISD::UINT_TO_FP, MVT::v2i64, Legal); [all...] |
/external/llvm/lib/Target/Sparc/ |
SparcISelLowering.cpp | [all...] |
/external/llvm/lib/CodeGen/ |
TargetLoweringBase.cpp | [all...] |
/external/llvm/lib/Target/Mips/ |
MipsSEISelLowering.cpp | 279 setOperationAction(ISD::UINT_TO_FP, Ty, Legal); [all...] |
MipsISelLowering.cpp | 297 setOperationAction(ISD::UINT_TO_FP, MVT::i32, Expand); 298 setOperationAction(ISD::UINT_TO_FP, MVT::i64, Expand); [all...] |