/external/chromium_org/third_party/mesa/src/src/mesa/drivers/dri/i965/ |
brw_wm_pass1.c | 135 track_arg(c, inst, 2, WRITEMASK_Z); 200 if (writemask & WRITEMASK_Z) read0 |= WRITEMASK_XY; 226 read0 |= WRITEMASK_Z;
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brw_lower_texture_gradients.cpp | 109 base_ir->insert_before(assign(size, new(mem_ctx) ir_constant(1.0f), WRITEMASK_Z));
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brw_vs_emit.c | 852 if (dst.dw1.bits.writemask & WRITEMASK_Z) { 862 brw_writemask(dst, WRITEMASK_Z), 928 if (dst.dw1.bits.writemask & WRITEMASK_Z) { 943 brw_writemask(tmp, WRITEMASK_Z), 948 brw_writemask(tmp, WRITEMASK_Z), 980 if (dst.dw1.bits.writemask & WRITEMASK_Z) 981 brw_MOV(p, brw_writemask(dst, WRITEMASK_Z), arg0); 1022 brw_MOV(p, brw_writemask(tmp, WRITEMASK_Z), brw_swizzle1(arg0,1)); 1027 brw_writemask(dst, WRITEMASK_Z), [all...] |
brw_wm_emit.c | [all...] |
/external/mesa3d/src/mesa/drivers/dri/i965/ |
brw_wm_pass1.c | 135 track_arg(c, inst, 2, WRITEMASK_Z); 200 if (writemask & WRITEMASK_Z) read0 |= WRITEMASK_XY; 226 read0 |= WRITEMASK_Z;
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brw_lower_texture_gradients.cpp | 109 base_ir->insert_before(assign(size, new(mem_ctx) ir_constant(1.0f), WRITEMASK_Z));
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brw_vs_emit.c | 852 if (dst.dw1.bits.writemask & WRITEMASK_Z) { 862 brw_writemask(dst, WRITEMASK_Z), 928 if (dst.dw1.bits.writemask & WRITEMASK_Z) { 943 brw_writemask(tmp, WRITEMASK_Z), 948 brw_writemask(tmp, WRITEMASK_Z), 980 if (dst.dw1.bits.writemask & WRITEMASK_Z) 981 brw_MOV(p, brw_writemask(dst, WRITEMASK_Z), arg0); 1022 brw_MOV(p, brw_writemask(tmp, WRITEMASK_Z), brw_swizzle1(arg0,1)); 1027 brw_writemask(dst, WRITEMASK_Z), [all...] |
brw_wm_emit.c | [all...] |
/external/chromium_org/third_party/mesa/src/src/mesa/program/ |
prog_instruction.c | 309 inst->DstReg.WriteMask == WRITEMASK_Z ||
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prog_instruction.h | 77 #define WRITEMASK_Z 0x4
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prog_execute.c | 515 if (writeMask & WRITEMASK_Z) { 518 writeMask &= ~WRITEMASK_Z; 538 if (writeMask & WRITEMASK_Z) 548 if (writeMask & WRITEMASK_Z) 586 if (writeMask & WRITEMASK_Z) { 589 writeMask &= ~WRITEMASK_Z; 602 if (writeMask & WRITEMASK_Z) 612 if (writeMask & WRITEMASK_Z) [all...] |
nvvertparse.c | 614 dstReg->WriteMask |= WRITEMASK_Z; [all...] |
program_lexer.l | 91 return WRITEMASK_Z;
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nvfragparse.c | 917 dstReg->WriteMask |= WRITEMASK_Z; [all...] |
prog_print.c | 536 if (writeMask & WRITEMASK_Z) [all...] |
ir_to_mesa.cpp | [all...] |
/external/mesa3d/src/mesa/program/ |
prog_instruction.c | 309 inst->DstReg.WriteMask == WRITEMASK_Z ||
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prog_instruction.h | 77 #define WRITEMASK_Z 0x4
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prog_execute.c | 515 if (writeMask & WRITEMASK_Z) { 518 writeMask &= ~WRITEMASK_Z; 538 if (writeMask & WRITEMASK_Z) 548 if (writeMask & WRITEMASK_Z) 586 if (writeMask & WRITEMASK_Z) { 589 writeMask &= ~WRITEMASK_Z; 602 if (writeMask & WRITEMASK_Z) 612 if (writeMask & WRITEMASK_Z) [all...] |
nvvertparse.c | 614 dstReg->WriteMask |= WRITEMASK_Z; [all...] |
program_lexer.l | 91 return WRITEMASK_Z;
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nvfragparse.c | 917 dstReg->WriteMask |= WRITEMASK_Z; [all...] |
prog_print.c | 536 if (writeMask & WRITEMASK_Z) [all...] |
/external/chromium_org/third_party/mesa/src/src/mesa/main/ |
ffvertex_prog.c | 660 emit_op2(p, OPCODE_DP4, dest, WRITEMASK_Z, src, mat[2]); 698 emit_op2(p, OPCODE_DP3, dest, WRITEMASK_Z, src, mat[2]); 1025 emit_op2(p, OPCODE_SLT, lit, WRITEMASK_Z, swizzle1(id,Z), dots); 1079 emit_op1(p, OPCODE_MOV, dots, WRITEMASK_Z, [all...] |
/external/mesa3d/src/mesa/main/ |
ffvertex_prog.c | 660 emit_op2(p, OPCODE_DP4, dest, WRITEMASK_Z, src, mat[2]); 698 emit_op2(p, OPCODE_DP3, dest, WRITEMASK_Z, src, mat[2]); 1025 emit_op2(p, OPCODE_SLT, lit, WRITEMASK_Z, swizzle1(id,Z), dots); 1079 emit_op1(p, OPCODE_MOV, dots, WRITEMASK_Z, [all...] |