| /external/llvm/lib/Target/X86/ |
| X86TargetTransformInfo.cpp | 570 { ISD::ZERO_EXTEND, MVT::v16i16, MVT::v16i8, 1 },
572 { ISD::ZERO_EXTEND, MVT::v8i32, MVT::v8i1, 3 },
574 { ISD::ZERO_EXTEND, MVT::v8i32, MVT::v8i8, 3 },
576 { ISD::ZERO_EXTEND, MVT::v8i32, MVT::v8i16, 1 },
578 { ISD::ZERO_EXTEND, MVT::v4i64, MVT::v4i1, 3 },
580 { ISD::ZERO_EXTEND, MVT::v4i64, MVT::v4i8, 3 },
582 { ISD::ZERO_EXTEND, MVT::v4i64, MVT::v4i16, 3 },
584 { ISD::ZERO_EXTEND, MVT::v4i64, MVT::v4i32, 1 },
597 { ISD::ZERO_EXTEND, MVT::v16i16, MVT::v16i8, 4 },
599 { ISD::ZERO_EXTEND, MVT::v8i32, MVT::v8i1, 4 }
[all...] |
| X86ISelLowering.cpp | [all...] |
| /external/llvm/lib/Target/ARM/ |
| ARMTargetTransformInfo.cpp | 216 { ISD::ZERO_EXTEND, MVT::v4i32, MVT::v4i16, 0 },
218 { ISD::ZERO_EXTEND, MVT::v2i64, MVT::v2i32, 1 },
224 { ISD::ZERO_EXTEND, MVT::v4i64, MVT::v4i16, 3 },
226 { ISD::ZERO_EXTEND, MVT::v8i32, MVT::v8i8, 3 },
228 { ISD::ZERO_EXTEND, MVT::v8i64, MVT::v8i8, 7 },
230 { ISD::ZERO_EXTEND, MVT::v8i64, MVT::v8i16, 6 },
232 { ISD::ZERO_EXTEND, MVT::v16i32, MVT::v16i8, 6 },
|
| ARMSelectionDAGInfo.cpp | 180 Src = DAG.getNode(ISD::ZERO_EXTEND, dl, MVT::i32, Src);
|
| ARMISelLowering.cpp | 556 setTargetDAGCombine(ISD::ZERO_EXTEND);
[all...] |
| /external/llvm/include/llvm/CodeGen/ |
| ISDOpcodes.h | 361 /// ZERO_EXTEND - Used for integer types, zeroing the new bits.
362 ZERO_EXTEND,
[all...] |
| /external/llvm/lib/Target/NVPTX/ |
| NVPTXISelLowering.cpp | 764 Elt = DAG.getNode(ISD::ZERO_EXTEND, dl, MVT::i16, Elt);
779 Elt0 = DAG.getNode(ISD::ZERO_EXTEND, dl, MVT::i16, Elt0);
780 Elt1 = DAG.getNode(ISD::ZERO_EXTEND, dl, MVT::i16, Elt1);
[all...] |
| /prebuilts/gcc/linux-x86/host/x86_64-w64-mingw32-4.8/lib/gcc/x86_64-w64-mingw32/4.8.3/plugin/include/ |
| rtl.def | 548 DEF_RTL_EXPR(ZERO_EXTEND, "zero_extend", "e", RTX_UNARY)
[all...] |
| /external/chromium_org/third_party/mesa/src/src/gallium/drivers/radeon/ |
| AMDILISelLowering.cpp | 184 setOperationAction(ISD::ZERO_EXTEND, MVT::v2i64, Expand);
199 setOperationAction(ISD::ZERO_EXTEND, MVT::v2f64, Expand);
434 Data = DAG.getNode(ISD::ZERO_EXTEND, DL, IVT, Data);
|
| /external/mesa3d/src/gallium/drivers/radeon/ |
| AMDILISelLowering.cpp | 184 setOperationAction(ISD::ZERO_EXTEND, MVT::v2i64, Expand);
199 setOperationAction(ISD::ZERO_EXTEND, MVT::v2f64, Expand);
434 Data = DAG.getNode(ISD::ZERO_EXTEND, DL, IVT, Data);
|
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| DAGCombiner.cpp | [all...] |
| LegalizeVectorTypes.cpp | 99 case ISD::ZERO_EXTEND:
408 case ISD::ZERO_EXTEND:
619 case ISD::ZERO_EXTEND:
[all...] |
| TargetLowering.cpp | 317 /// casts are free. This uses isZExtFree and ZERO_EXTEND for the widening
357 SDValue Z = DAG.getNode(NeedZext ? ISD::ZERO_EXTEND : ISD::ANY_EXTEND,
[all...] |
| SelectionDAGDumper.cpp | 221 case ISD::ZERO_EXTEND: return "zero_extend";
|
| LegalizeIntegerTypes.cpp | 96 case ISD::ZERO_EXTEND:
318 unsigned Opc = VT.isByteSized() ? ISD::SIGN_EXTEND : ISD::ZERO_EXTEND;
431 if (N->getOpcode() == ISD::ZERO_EXTEND)
764 SDValue Res = DAG.getNode(ISD::ZERO_EXTEND, dl, NVT, Parts[0]);
766 SDValue Part = DAG.getNode(ISD::ZERO_EXTEND, dl, NVT, Parts[i]);
[all...] |
| LegalizeVectorOps.cpp | 268 case ISD::ZERO_EXTEND:
398 unsigned Opc = Op.getOpcode() == ISD::UINT_TO_FP ? ISD::ZERO_EXTEND :
[all...] |
| LegalizeDAG.cpp | 606 unsigned CastOpc = IdxVT.bitsGT(PtrVT) ? ISD::TRUNCATE : ISD::ZERO_EXTEND;
[all...] |
| SelectionDAG.cpp | 243 return ISD::ZERO_EXTEND;
[all...] |
| LegalizeFloatTypes.cpp | 601 SDValue Op = DAG.getNode(Signed ? ISD::SIGN_EXTEND : ISD::ZERO_EXTEND, dl,
[all...] |
| FastISel.cpp | [all...] |
| /external/llvm/lib/Target/SystemZ/ |
| SystemZISelDAGToDAG.cpp | 768 case ISD::ZERO_EXTEND:
[all...] |
| /external/llvm/lib/Target/Sparc/ |
| SparcISelLowering.cpp | 279 OutVal = DAG.getNode(ISD::ZERO_EXTEND, DL, VA.getLocVT(), OutVal);
297 SDValue NV = DAG.getNode(ISD::ZERO_EXTEND, DL, MVT::i64, OutVals[i+1]);
764 Arg = DAG.getNode(ISD::ZERO_EXTEND, dl, VA.getLocVT(), Arg);
[all...] |
| /external/llvm/lib/Target/PowerPC/ |
| PPCISelLowering.cpp | 650 setTargetDAGCombine(ISD::ZERO_EXTEND);
[all...] |
| /external/llvm/lib/Target/AArch64/ |
| AArch64ISelLowering.cpp | 354 setTargetDAGCombine(ISD::ZERO_EXTEND);
[all...] |
| /external/llvm/lib/CodeGen/ |
| TargetLoweringBase.cpp | [all...] |
