| /external/valgrind/main/VEX/priv/ |
| host_x86_isel.c | 209 static void addInstr ( ISelEnv* env, X86Instr* instr )
311 addInstr(env,
318 addInstr(env,
352 addInstr(env, X86Instr_Push(X86RMI_Reg(r_vecRetAddr)));
356 addInstr(env, X86Instr_Push(X86RMI_Reg(hregX86_EBP())));
362 addInstr(env, X86Instr_Push(iselIntExpr_RMI(env, arg)));
368 addInstr(env, X86Instr_Push(X86RMI_Reg(rHi)));
369 addInstr(env, X86Instr_Push(X86RMI_Reg(rLo)));
390 addInstr(env, X86Instr_Call( cc, toUInt(Ptr_to_ULong(cee->addr)),
529 addInstr(env, mk_iMOVsd_RR( hregX86_ESP(), r_vecRetAddr ))
[all...] |
| host_s390_isel.c | 173 addInstr(ISelEnv *env, s390_insn *insn)
550 addInstr(env, s390_insn_alu(4, S390_ALU_SUB, sp, s390_opnd_imm(16)));
551 addInstr(env, s390_insn_move(sizeof(ULong), r_vecRetAddr, sp));
567 addInstr(env, s390_insn_move(sizeof(ULong), tmpregs[argreg],
572 addInstr(env, s390_insn_move(sizeof(ULong), tmpregs[argreg],
599 addInstr(env, s390_insn_move(size, finalreg, tmpregs[i]));
635 addInstr(env, s390_insn_helper_call(cc, (Addr64)target, n_args,
680 addInstr(env, s390_insn_load_immediate(4, mode, 4));
681 addInstr(env, s390_insn_alu(4, S390_ALU_SUB, mode, s390_opnd_reg(ir)));
682 addInstr(env, s390_insn_alu(4, S390_ALU_AND, mode, s390_opnd_imm(3)))
[all...] |
| host_amd64_isel.c | 185 static void addInstr ( ISelEnv* env, AMD64Instr* instr )
332 addInstr(env,
340 addInstr(env,
352 addInstr( env, AMD64Instr_Push(AMD64RMI_Imm( (UInt)uimm64 )) );
355 addInstr( env, AMD64Instr_Imm64(uimm64, tmp) );
356 addInstr( env, AMD64Instr_Push(AMD64RMI_Reg(tmp)) );
553 addInstr (that is, commit to) any instructions until we're
580 addInstr(env, fastinstrs[i]);
603 addInstr(env, mk_iMOVsd_RR( hregAMD64_RSP(), r_vecRetAddr ));
608 addInstr(env, mk_iMOVsd_RR( hregAMD64_RSP(), r_vecRetAddr ))
[all...] |
| host_mips_isel.c | 160 static void addInstr(ISelEnv * env, MIPSInstr * instr)
197 addInstr(env, MIPSInstr_Alu(Malu_DADD, sp, sp, MIPSRH_Imm(True,
200 addInstr(env, MIPSInstr_Alu(Malu_ADD, sp, sp, MIPSRH_Imm(True,
209 addInstr(env, MIPSInstr_Alu(Malu_DSUB, sp, sp,
212 addInstr(env, MIPSInstr_Alu(Malu_SUB, sp, sp,
289 addInstr(env, MIPSInstr_Shft(Mshft_SLL, True, tmp, irrm,
291 addInstr(env, MIPSInstr_Alu(Malu_XOR, tmp, irrm, MIPSRH_Reg(tmp)));
292 addInstr(env, MIPSInstr_Alu(Malu_AND, irrm, tmp, MIPSRH_Imm(False, 3)));
294 addInstr(env, MIPSInstr_MfFCSR(fcsr_old));
299 addInstr(env, MIPSInstr_Store(4, am_addr, fcsr_old, mode64))
[all...] |
| host_ppc_isel.c | 333 static void addInstr ( ISelEnv* env, PPCInstr* instr )
494 addInstr(env, PPCInstr_Alu( Palu_ADD, sp, sp,
502 addInstr(env, PPCInstr_Alu( Palu_SUB, sp, sp,
516 addInstr(env, mk_iMOVds_RR(r, StackFramePtr(env->mode64)));
518 addInstr(env, PPCInstr_Alu( Palu_ADD, r, r,
521 addInstr(env,
523 addInstr(env, PPCInstr_Alu(Palu_AND, r,r, PPCRH_Reg(align16)));
545 addInstr(env, PPCInstr_Store( 4, am_addr0, r_srcHi, env->mode64 ));
546 addInstr(env, PPCInstr_Store( 4, am_addr1, r_srcLo, env->mode64 ));
549 addInstr(env, PPCInstr_FpLdSt(True/*load*/, 8, fr_dst, am_addr0))
[all...] |
| host_arm_isel.c | 145 static void addInstr ( ISelEnv* env, ARMInstr* instr )
304 addInstr(env, ARMInstr_Imm32(rTmp, DEFAULT_FPSCR));
305 addInstr(env, ARMInstr_FPSCR(True/*toFPSCR*/, rTmp));
342 addInstr(env, ARMInstr_Shift(ARMsh_SHL, tL, irrm, ARMRI5_I5(1)));
343 addInstr(env, ARMInstr_Shift(ARMsh_SHR, tR, irrm, ARMRI5_I5(1)));
344 addInstr(env, ARMInstr_Alu(ARMalu_AND, tL, tL, ARMRI84_I84(2,0)));
345 addInstr(env, ARMInstr_Alu(ARMalu_AND, tR, tR, ARMRI84_I84(1,0)));
346 addInstr(env, ARMInstr_Alu(ARMalu_OR, t3, tL, ARMRI84_R(tR)));
347 addInstr(env, ARMInstr_Shift(ARMsh_SHL, t3, t3, ARMRI5_I5(22)));
348 addInstr(env, ARMInstr_FPSCR(True/*toFPSCR*/, t3))
[all...] |
| host_arm64_isel.c | 139 static void addInstr ( ISelEnv* env, ARM64Instr* instr )
297 addInstr(env, ARM64Instr_Arith(r, hregARM64_X21(),
313 addInstr(env, ARM64Instr_Logic(dst, src, mask, ARM64lo_AND));
323 addInstr(env, ARM64Instr_Shift(dst, src, n48, ARM64sh_SHL));
324 addInstr(env, ARM64Instr_Shift(dst, dst, n48, ARM64sh_SAR));
334 addInstr(env, ARM64Instr_Shift(dst, src, n48, ARM64sh_SHL));
335 addInstr(env, ARM64Instr_Shift(dst, dst, n48, ARM64sh_SHR));
345 addInstr(env, ARM64Instr_Shift(dst, src, n32, ARM64sh_SHL));
346 addInstr(env, ARM64Instr_Shift(dst, dst, n32, ARM64sh_SAR));
356 addInstr(env, ARM64Instr_Shift(dst, src, n56, ARM64sh_SHL))
[all...] |
