| /external/chromium_org/third_party/openmax_dl/dl/sp/src/arm/neon/ |
| armSP_FFT_CToC_SC16_Radix4_fs_unsafe_s.S | 94 #define dYi3 D15.S16
183 VHSUB dZr3,dYr2,dYi3 @// y3
190 VHADD dZr2,dYr2,dYi3 @// y1
200 VHADD dZr2,dYr2,dYi3 @// y1
207 VHSUB dZr3,dYr2,dYi3 @// y3
237 VSUB dZr3,dYr2,dYi3 @// y3
244 VADD dZr2,dYr2,dYi3 @// y1
254 VADD dZr2,dYr2,dYi3 @// y1
261 VSUB dZr3,dYr2,dYi3 @// y3
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| armSP_FFT_CToC_SC16_Radix4_unsafe_s.S | 105 #define dYi3 D19.S16
261 VHADD dZr2,dYr0,dYi3
268 VHSUB dZr3,dYr0,dYi3
278 VHSUB dZr3,dYr0,dYi3
285 VHADD dZr2,dYr0,dYi3
311 VADD dZr2,dYr0,dYi3
318 VSUB dZr3,dYr0,dYi3
328 VSUB dZr3,dYr0,dYi3
335 VADD dZr2,dYr0,dYi3
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| armSP_FFT_CToC_SC32_Radix4_fs_unsafe_s.S | 94 #define dYi3 D15.S32
186 VHSUB dZr3,dYr2,dYi3
194 VHADD dZr2,dYr2,dYi3
208 VHADD dZr2,dYr2,dYi3
216 VHSUB dZr3,dYr2,dYi3
248 VSUB dZr3,dYr2,dYi3
256 VADD dZr2,dYr2,dYi3
270 VADD dZr2,dYr2,dYi3
278 VSUB dZr3,dYr2,dYi3
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| armSP_FFT_CToC_SC16_Radix4_ls_unsafe_s.S | 130 #define dYi3 D15.S16
289 VHADD dZr3,dYr0,dYi3 @// y3 = u0-ju3
293 VHSUB dZr1,dYr0,dYi3 @// y1 = u0+ju3
301 VHSUB dZr1,dYr0,dYi3 @// y1 = u0+ju3
304 VHADD dZr3,dYr0,dYi3 @// y3 = u0-ju3
331 VADD dZr3,dYr0,dYi3 @// y3 = u0-ju3
335 VSUB dZr1,dYr0,dYi3 @// y1 = u0+ju3
343 VSUB dZr1,dYr0,dYi3 @// y1 = u0+ju3
346 VADD dZr3,dYr0,dYi3 @// y3 = u0-ju3
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| armSP_FFT_CToC_SC32_Radix4_ls_unsafe_s.S | 103 #define dYi3 D23.S32
282 VHADD dZr3,dYr0,dYi3
289 VHSUB dZr1,dYr0,dYi3
300 VHSUB dZr1,dYr0,dYi3
307 VHADD dZr3,dYr0,dYi3
334 VADD dZr3,dYr0,dYi3
341 VSUB dZr1,dYr0,dYi3
352 VSUB dZr1,dYr0,dYi3
359 VADD dZr3,dYr0,dYi3
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| armSP_FFT_CToC_SC32_Radix4_unsafe_s.S | 107 #define dYi3 D19.S32
270 VHADD dZr3,dYr0,dYi3
277 VHSUB dZr1,dYr0,dYi3
286 VHSUB dZr1,dYr0,dYi3
293 VHADD dZr3,dYr0,dYi3
320 VADD dZr3,dYr0,dYi3
327 VSUB dZr1,dYr0,dYi3
336 VSUB dZr1,dYr0,dYi3
343 VADD dZr3,dYr0,dYi3
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| armSP_FFT_CToC_FC32_Radix4_fs_unsafe_s.S | 86 #define dYi3 D15.F32
185 VSUB dZr3,dYr2,dYi3
193 VADD dZr2,dYr2,dYi3
212 VADD dZr2,dYr2,dYi3
220 VSUB dZr3,dYr2,dYi3
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| armSP_FFT_CToC_FC32_Radix4_ls_unsafe_s.S | 95 #define dYi3 D23.F32
276 VADD dZr3,dYr0,dYi3
283 VSUB dZr1,dYr0,dYi3
295 VSUB dZr1,dYr0,dYi3
302 VADD dZr3,dYr0,dYi3
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| armSP_FFT_CToC_FC32_Radix4_unsafe_s.S | 98 #define dYi3 D19.F32
264 VADD dZr3,dYr0,dYi3
271 VSUB dZr1,dYr0,dYi3
280 VSUB dZr1,dYr0,dYi3
287 VADD dZr3,dYr0,dYi3
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| armSP_FFT_CToC_SC16_Radix8_fs_unsafe_s.S | 175 #define dYi3 D27.S16
352 VHSUB dYi3,dVi3,dVi7
358 VST2 {dYr3,dYi3},[pDst :128],step1 @// store y3
393 VHSUB dYi3,dVi3,dVi7
398 VST2 {dYr3,dYi3},[pDst :128],step1 @// store y5
514 VSUB dYi3,dVi3,dVi7
520 VST2 {dYr3,dYi3},[pDst :128],step1 @// store y3
555 VSUB dYi3,dVi3,dVi7
560 VST2 {dYr3,dYi3},[pDst :128],step1 @// store y5
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| armSP_FFT_CToC_SC32_Radix8_fs_unsafe_s.S | 172 #define dYi3 D27.S32
346 VHSUB dYi3,dVi3,dVi7
352 VST2 {dYr3,dYi3},[pDst :128],step1 @// store y3
385 VHSUB dYi3,dVi3,dVi7
390 VST2 {dYr3,dYi3},[pDst :128],step1 @// store y5
505 VSUB dYi3,dVi3,dVi7
511 VST2 {dYr3,dYi3},[pDst :128],step1 @// store y3
544 VSUB dYi3,dVi3,dVi7
549 VST2 {dYr3,dYi3},[pDst :128],step1 @// store y5
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| armSP_FFT_CToC_FC32_Radix8_fs_unsafe_s.S | 159 #define dYi3 D27.F32
338 VSUB dYi3,dVi3,dVi7
344 VST2 {dYr3,dYi3},[pDst :128],step1 @// store y3
383 VSUB dYi3,dVi3,dVi7
388 VST2 {dYr3,dYi3},[pDst :128],step1 @// store y5
|
| /external/chromium_org/third_party/openmax_dl/dl/sp/src/arm/arm64/ |
| armSP_FFT_CToC_FC32_Radix4_fs_s.S | 86 #define dYi3 v15.2s
170 fsub dYi3, dXi1, dXi3
189 FSUB dZr3,dYr2,dYi3
199 FADD dZr2,dYr2,dYi3
223 FADD dZr2,dYr2,dYi3
233 FSUB dZr3,dYr2,dYi3
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| armSP_FFT_CToC_FC32_Radix4_ls_s.S | 102 #define dYi3 v23.2s
302 fsub dYi3,dZi1,dZi3
312 fadd dZr3,dYr0,dYi3
322 fsub dZr1,dYr0,dYi3
336 fsub dZr1,dYr0,dYi3
346 fadd dZr3,dYr0,dYi3
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| armSP_FFT_CToC_FC32_Radix4_s.S | 101 #define dYi3 v19.2s
261 fsub dYi3,dZi1,dZi3
271 fadd dZr3,dYr0,dYi3
281 fsub dZr1,dYr0,dYi3
290 fsub dZr1,dYr0,dYi3
300 fadd dZr3,dYr0,dYi3
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| armSP_FFT_CToC_FC32_Radix8_fs_s.S | 159 #define dYi3 v27.2s
388 fsub dYi3,dVi3,dVi7
394 st2 {dYr3,dYi3},[pDst],step1 // store y3
435 fsub dYi3,dVi3,dVi7
442 st2 {dYr3,dYi3},[pDst],step1 // store y5
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