| /frameworks/av/media/libstagefright/codecs/on2/h264dec/omxdl/arm_neon/vc/m4p10/src/ |
| armVCM4P10_TransformResidual4x4_s.s | 65 dZero DN D4.S16
112 VMOV dZero,#0 ;// Used to right shift by 1
122 VHADD dIn1RS,dIn1,dZero ;// (f1>>1) constZero is a register holding 0
123 VHADD dIn3RS,dIn3,dZero
149 VHADD df1RS,df1,dZero ;// (f1>>1) constZero is a register holding 0
150 VHADD df3RS,df3,dZero
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| omxVCM4P10_TransformDequantChromaDCFromPair_s.s | 64 dZero DN D0.U16
75 VMOV dZero, #0
82 VST1 dZero,[pDst] ;// pDst[0] = pDst[1] = pDst[2] = pDst[3] = 0
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| omxVCM4P10_DequantTransformResidualFromPairAndAdd_s.s | 144 dZero DN D4.S16
286 VMOV dZero,#0 ;// Used to right shift by 1
296 VHADD dIn1RS,dIn1,dZero ;// (f1>>1) constZero is a register holding 0
297 VHADD dIn3RS,dIn3,dZero
323 VHADD df1RS,df1,dZero ;// (f1>>1) constZero is a register holding 0
324 VHADD df3RS,df3,dZero
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| /external/chromium_org/third_party/openmax_dl/dl/sp/src/arm/neon/ |
| omxSP_FFTFwd_RToCCS_F32_Sfs_s.S | 95 #define dzero d1.f32 define
96 #define dZero d2.f32
156 VMOV dzero[0],zero
157 VMOV dZero[0],zero
158 VST3 {dX0[0],dzero[0],dZero[0]},[pDst]
287 VDUP dzero,zero
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| omxSP_FFTFwd_RToCCS_S32_Sfs_s.S | 109 #define dzero d1.s32 define
110 #define dZero d2.s32
172 VMOV dzero[0],zero
174 VMOV dZero[0],zero
175 VST3 {dX0[0],dzero[0],dZero[0]},[pDst]
429 VDUP dzero,zero
472 VHADD dT0,dT0,dzero
473 VHADD dT1,dT1,dzero
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| omxSP_FFTFwd_RToCCS_S16_Sfs_s.S | 90 #define dzero d1.s16 define
91 #define dZero d2.s16
443 VDUP dzero,zero
541 VDUP dzero,zero
578 VHADD dT0,dT0,dzero
579 VHADD dT1,dT1,dzero
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